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K53P144M100SF2 Datasheet(PDF) 21 Page - Freescale Semiconductor, Inc |
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K53P144M100SF2 Datasheet(HTML) 21 Page - Freescale Semiconductor, Inc |
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21 / 80 page ![]() 4. 15pF load 5.3 Thermal specifications 5.3.1 Thermal operating requirements Table 9. Thermal operating requirements Symbol Description Min. Max. Unit TJ Die junction temperature –40 125 °C TA Ambient temperature –40 85 °C 5.3.2 Thermal attributes Board type Symbol Description 144 LQFP 144 MAPBGA Unit Notes Single- layer (1s) RθJA Thermal resistance, junction to ambient (natural convection) 52 50 °C/W 1 Four-layer (2s2p) RθJA Thermal resistance, junction to ambient (natural convection) 44 30 °C/W 1 Single- layer (1s) RθJMA Thermal resistance, junction to ambient (200 ft./ min. air speed) 43 41 °C/W 1 Four-layer (2s2p) RθJMA Thermal resistance, junction to ambient (200 ft./ min. air speed) 38 27 °C/W 1 — RθJB Thermal resistance, junction to board 33 17 °C/W 2 — RθJC Thermal resistance, junction to case 11 10 °C/W 3 — ΨJT Thermal characterization parameter, junction to package top outside center (natural convection) 2 2 °C/W 4 1. Determined according to JEDEC Standard JESD51-2, Integrated Circuits Thermal Test Method Environmental Conditions—Natural Convection (Still Air), or EIA/JEDEC Standard JESD51-6, Integrated Circuit Thermal Test Method Environmental Conditions—Forced Convection (Moving Air). 6 Peripheral operating requirements and behaviors All digital I/O switching characteristics assume: 1. output pins • have CL=30pF loads, • are configured for fast slew rate (PORTx_PCRn[SRE]=0), and • are configured for high drive strength (PORTx_PCRn[DSE]=1) Peripheral operating requirements and behaviors K53 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011. Freescale Semiconductor, Inc. Preliminary 21 |
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