MPC5643L_11 datasheet(18/124 Pages) FREESCALE

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MPC5643L Microcontroller Data Sheet, Rev. 6

Preliminary—Subject to Change Without Notice

Introduction

Freescale Semiconductor

1.6.32

Sine Wave Generator (SWG)

A digital-to-analog converter is available to generate a sine wave based on 32 stored values for external devices (ex: resolver).

•

Frequency range from 1 kHz to 50 kHz

•

Sine wave amplitude from 0.47 V to 2.26 V

1.6.33

Analog-to-Digital Converter module (ADC)

The ADC module features include:

Analog part:

•

2 on-chip ADCs

— 12-bit resolution SAR architecture

— Same digital interface as in the MPC5604P family

— A/D Channels: 9 external, 3 internal and 4 shared with other A/D (total 16 channels)

— One channel dedicated to each T-sensor to enable temperature reading during application

— Separated reference for each ADC

— Shared analog supply voltage for both ADCs

— One sample and hold unit per ADC

— Adjustable sampling and conversion time

Digital part:

•

4 analog watchdogs comparing ADC results against predefined levels (low, high, range) before results are stored in

the appropriate ADC result location

•

2 modes of operation: Motor Control Mode or Regular Mode

•

Regular mode features

— Register based interface with the CPU: one result register per channel

— ADC state machine managing three request flows: regular command, hardware injected command, software

injected command

— Selectable priority between software and hardware injected commands

— 4 analog watchdogs comparing ADC results against predefined levels (low, high, range)

— DMA compatible interface

•

CTU mode features

— Triggered mode only

— 4 independent result queues (1

 16 entries, 2  8 entries, 1  4 entries)

— Result alignment circuitry (left justified; right justified)

— 32-bit read mode allows to have channel ID on one of the 16-bit parts

— DMA compatible interfaces

•

Built-in self-test features triggered by software

1.6.34

Cross Triggering Unit (CTU)

The ADC cross triggering unit allows automatic generation of ADC conversion requests on user selected conditions without

CPU load during the PWM period and with minimized CPU load for dynamic configuration.

The CTU implements the following features:

•

Cross triggering between ADC, FlexPWM, eTimer, and external pins

•

Double buffered trigger generation unit with as many as 8 independent triggers generated from external triggers

•

Maximum operating frequency less than or equal to 120 MHz

MPC5643L Datasheet(PDF) 18 Page - Freescale Semiconductor, Inc

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