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HT66F13 Datasheet(PDF) 53 Page - Holtek Semiconductor Inc |
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HT66F13 Datasheet(HTML) 53 Page - Holtek Semiconductor Inc |
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53 / 173 page ![]() Input/OutputPorts Holtek microcontrollers offer considerable flexibility on their I/O ports. With the input or output designation of every pin fully under user program control, pull-high selections for all ports and wake-up selections on certain pins, the user is provided with an I/O structure to meet the needs of a wide range of application possibilities. The device provides bidirectional input/output lines labeled with port names PA~PD. These I/O ports are mapped to the RAM Data Memory with specific addresses as shown in the Special Purpose Data Memory table. All of these I/O ports can be used for input and output operations. For input operation, these ports are non-latching, which means the inputs must be ready at the T2 rising edge of instruction ²MOV A,[m]², where m denotes the port address. For output operation, all the data is latched and remains unchanged until the output latch is rewritten. I/ORegisterList HT66F13 Register Name Bit 7 6 5 4 3 2 1 0 PAWU D7 D6 D5 D4 D3 D2 D1 D0 PAPU D7 D6 D5 D4 D3 D2 D1 D0 PA D7 D6 D5 D4 D3 D2 D1 D0 PAC D7 D6 D5 D4 D3 D2 D1 D0 PBPU D7 D6 D5 D4 D3 D2 D1 D0 PB D7 D6 D5 D4 D3 D2 D1 D0 PBC D7 D6 D5 D4 D3 D2 D1 D0 PCPU ¾ ¾ ¾ ¾ ¾ ¾ D1 D0 PC ¾ ¾ ¾ ¾ ¾ ¾ D1 D0 PCC ¾ ¾ ¾ ¾ ¾ ¾ D1 D0 HT66F14 Register Name Bit 7 6 5 4 3 2 1 0 PAWU D7 D6 D5 D4 D3 D2 D1 D0 PAPU D7 D6 D5 D4 D3 D2 D1 D0 PA D7 D6 D5 D4 D3 D2 D1 D0 PAC D7 D6 D5 D4 D3 D2 D1 D0 PBPU D7 D6 D5 D4 D3 D2 D1 D0 PB D7 D6 D5 D4 D3 D2 D1 D0 PBC D7 D6 D5 D4 D3 D2 D1 D0 PCPU ¾ ¾ ¾ ¾ D3 D2 D1 D0 PC ¾ ¾ ¾ ¾ D3 D2 D1 D0 PCC ¾ ¾ ¾ ¾ D3 D2 D1 D0 PDPU ¾ ¾ ¾ ¾ ¾ ¾ D1 D0 PD ¾ ¾ ¾ ¾ ¾ ¾ D1 D0 PDC ¾ ¾ ¾ ¾ ¾ ¾ D1 D0 Rev.1.10 53 February9,2011 HT66F13/HT66F14/HT66F15 EnhancedA/DFlashType MCU |
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