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IXFC13N50 Datasheet(PDF) 1 Page - IXYS Corporation |
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IXFC13N50 Datasheet(HTML) 1 Page - IXYS Corporation |
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1 / 2 page  © 2003 IXYS All rights reserved Symbol Test Conditions Maximum Ratings V DSS T J = 25°C to 150°C 500 V V DGR T J = 25°C to 150°C; RGS = 1 MΩ 500 V V GS Continuous ±20 V V GSM Transient ±30 V I D25 T C = 25°C12 A I DM T C = 25°C, pulse width limited by TJM 48 A I AR T C = 25°C13 A E AR T C = 25°C18 mJ dv/dt I S ≤ I DM, di/dt ≤ 100 A/µs, VDD ≤ VDSS, 5 V/ns T J ≤ 150°C, RG = 2 Ω P D T C = 25°C 140 W T J -55 ... +150 °C T JM 150 °C T stg -55 ... +150 °C T L 1.6 mm (0.062 in.) from case for 10 s 300 °C Weight 3g Symbol Test Conditions Characteristic Values (T J = 25°C, unless otherwise specified) min. typ. max. V DSS V GS = 0 V, ID = 250 µA 500 V V GS(th) V DS = VGS, ID = 2.5 mA 2 4 V I GSS V GS = ±20 VDC, VDS = 0 ±100 nA I DSS V DS = 0.8 • VDSS T J = 25°C 200 µA V GS = 0 V T J = 125°C1 mA R DS(on) V GS = 10 V, ID = IT 0.4 Ω Notes 1, 2 N-Channel Enhancement Mode High dv/dt, Low t rr, HDMOS TM Family HiPerFETTM MOSFET IXFC13N50 V DSS = 500 V ISOPLUS220TM I D25 = 12 A Electrically Isolated Back Surface R DS(on) = 0.4 Ω Ω Ω Ω Ω t rr ≤≤≤≤≤ 250 ns DS98756(7/03) ADVANCED TECHNICAL INFORMATION Features Silicon chip on Direct-Copper-Bond substrate - High power dissipation -Isolatedmountingsurface -2500Velectricalisolation Lowdraintotabcapacitance(<35pF) Low R DS (on) HDMOS TM process Ruggedpolysilicongatecellstructure UnclampedInductiveSwitching(UIS) rated FastintrinsicRectifier Applications DC-DC converters Batterychargers Switched-modeandresonant-mode power supplies DC choppers ACmotorcontrol Advantages Easyassembly:noscrewsorisolation foilsrequired Space savings High power density Lowcollectorcapacitancetoground (low EMI) G = Gate D = Drain S = Source G D S ISOPLUS 220TM Isolated back surface* See IXFH13N50 data sheet for characteristic curves |
Similar Part No. - IXFC13N50 |
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