R5F2136CMDFD datasheet(15/61 Pages) RENESAS

Part #	R5F2136CMDFD

Description	The R8C/36M Group has data flash (1 KB 횞 4 blocks) with the background operation

PDF	61 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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R8C/36M Group

2. Central Processing Unit (CPU)

Under development Preliminary document

Specifications in this document are tentative and subject to change.

R01DS0086EJ0010 Rev.0.10

Page 15 of 58

Mar 09, 2011

2.8.7

Interrupt Enable Flag (I)

The I flag enables maskable interrupts.

Interrupts are disabled when the I flag is set to 0, and are enabled when the I flag is set to 1. The I flag is set to 0

when an interrupt request is acknowledged.

2.8.8

Stack Pointer Select Flag (U)

ISP is selected when the U flag is set to 0; USP is selected when the U flag is set to 1.

The U flag is set to 0 when a hardware interrupt request is acknowledged or the INT instruction of software

interrupt numbers 0 to 31 is executed.

2.8.9

Processor Interrupt Priority Level (IPL)

IPL is 3 bits wide and assigns processor interrupt priority levels from level 0 to level 7.

If a requested interrupt has higher priority than IPL, the interrupt is enabled.

2.8.10

Reserved Bit

If necessary, set to 0. When read, the content is undefined.

R5F2136CMDFD Datasheet(PDF) 15 Page - Renesas Technology Corp