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ADIS16210PCBZ Datasheet(PDF) 3 Page - Analog Devices |
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ADIS16210PCBZ Datasheet(HTML) 3 Page - Analog Devices |
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3 / 20 page ![]() ADIS16210 Rev. A | Page 3 of 20 SPECIFICATIONS TA = −40°C to +85°C, VDD = 3.0 V to 3.6 V, unless otherwise noted. Table 1. Parameter Test Conditions/Comments Min Typ Max Unit INCLINOMETERS Measurement Range −180 +180 Degrees Relative Accuracy ±30°, AVG_CNT ≥ 0x0009, μ ± 3 σ ±0.1 Degrees ±60°, AVG_CNT ≥ 0x0009, μ ± 1 σ ±0.1 Degrees ±60°, AVG_CNT ≥ 0x0009, μ ± 3 σ ±0.15 Degrees ±180°, AVG_CNT ≥ 0x0009, μ ± 1 σ ±0.14 Degrees ±180°, AVG_CNT ≥ 0x0009, μ ± 3 σ ±0.21 Degrees Noise Density TA = 25°C, AVG_CNT = 0x0000 ±0.011 °/√Hz ACCELEROMETERS Measurement Range ±1.7 g Offset Error μ ± 1 σ ±1 mg Sensitivity Error μ ± 1 σ ±0.0244 % Nonlinearity ±1 g, μ ± 1 σ ±1 ±2 mg Misalignment Axis to axis, deviation from 90°, μ ± 1 σ ±0.05 Degrees Noise Density TA = 25°C, AVG_CNT = 0x0000 190 μg/√Hz Bandwidth −3 dB decrease in dc sensitivity, TA = 25°C 50 Hz Sensor Resonant Frequency TA = 25°C 5.5 kHz LOGIC INPUTS1 Input High Voltage, VINH 2.0 V Input Low Voltage, VINL 0.8 V Logic 1 Input Current, IINH VIH = 3.3 V ±0.2 ±1 μA Logic 0 Input Current, IINL VIL = 0 V All Except RST −40 −60 μA RST −1 mA Input Capacitance, CIN 10 pF DIGITAL OUTPUTS1 Output High Voltage, VOH ISOURCE = 1.6 mA 2.4 V Output Low Voltage, VOL ISINK = 1.6 mA 0.4 V FLASH MEMORY Endurance2 10,000 Cycles Data Retention3 TJ = 85°C 20 Years START-UP TIME4 Initial Startup 156 ms Reset Recovery5 RST pulse low or Register GLOB_CMD[7] = 1 33.8 ms Sleep Mode Recovery After CS assertion from high to low 22.3 ms CONVERSION RATE Register AVG_CNT = 0x0000 512 SPS Clock Accuracy 3 % POWER SUPPLY Operating voltage range, VDD 3.0 3.3 3.6 V Power Supply Current Normal mode, TA = 25°C 18 mA Sleep mode, TA = 25°C 230 μA 1 The digital I/O signals are 5 V tolerant. 2 Endurance is qualified as per JEDEC Standard 22, Method A117, and measured at −40°C, +25°C, +85°C, and +125°C. 3 Retention lifetime equivalent at junction temperature (TJ) = 85°C as per JEDEC Standard 22, Method A117. Retention lifetime decreases with junction temperature. See Figure 22. 4 The start-up times presented do not include the data capture time, which is dependent on the AVG_CNT register settings. 5 The RST pin must be held low for at least 15 ns. |
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