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TMS320LC2401AVFS Datasheet(PDF) 85 Page - Texas Instruments |
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TMS320LC2401AVFS Datasheet(HTML) 85 Page - Texas Instruments |
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85 / 88 page ![]() TMS320LF2401A, TMS320LC2401A DSP CONTROLLERS SPRS161K − MARCH 2001 − REVISED JULY 2007 85 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 peripheral register description (continued) Table 16. Lx2401A DSP Peripheral Register Description (Continued) ADDR BIT 15 BIT 14 BIT 13 BIT 12 BIT 11 BIT 10 BIT 9 BIT 8 REG ADDR BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 REG CAPTURE UNIT REGISTERS − EVA 07420h CAPRES CAPQEPN CAP3EN — CAP3TSEL CAP12TSEL CAP3TOADC CAPCONA 07420h CAP1EDGE CAP2EDGE CAP3EDGE — CAPCONA 07421h Illegal 07422h — CAP3FIFO CAP2FIFO CAP1FIFO CAPFIFOA 07422h — — — — — — — — CAPFIFOA 07423h D15 D14 D13 D12 D11 D10 D9 D8 CAP1FIFO 07423h D7 D6 D5 D4 D3 D2 D1 D0 CAP1FIFO 07424h D15 D14 D13 D12 D11 D10 D9 D8 CAP2FIFO 07424h D7 D6 D5 D4 D3 D2 D1 D0 CAP2FIFO 07425h D15 D14 D13 D12 D11 D10 D9 D8 CAP3FIFO 07425h D7 D6 D5 D4 D3 D2 D1 D0 CAP3FIFO 07426h Illegal 07427h D15 D14 D13 D12 D11 D10 D9 D8 CAP1FBOT 07427h D7 D6 D5 D4 D3 D2 D1 D0 CAP1FBOT 07428h D15 D14 D13 D12 D11 D10 D9 D8 CAP2FBOT 07428h D7 D6 D5 D4 D3 D2 D1 D0 CAP2FBOT 07429h D15 D14 D13 D12 D11 D10 D9 D8 CAP3FBOT 07429h D7 D6 D5 D4 D3 D2 D1 D0 CAP3FBOT 0742Ah to 0742Bh Illegal EVENT MANAGER (EVA) INTERRUPT CONTROL REGISTERS 0742Ch — — — — — T1OFINT ENA T1UFINT ENA T1CINT ENA EVAIMRA 0742Ch T1PINT ENA — — — CMP3INT ENA CMP2INT ENA CMP1INT ENA PDPINTA ENA EVAIMRA — — — — — — — — 0742Dh — — — — T2OFINT ENA T2UFINT ENA T2CINT ENA T2PINT ENA EVAIMRB — — — — — — — — 0742Eh — — — — — CAP3INT ENA CAP2INT ENA CAP1INT ENA EVAIMRC These bits are not applicable in the Lx2401A since either (i) the peripheral functionality is absent or (ii) the corre- These bits are not applicable in the Lx2401A since either (i) the peripheral functionality is absent or (ii) the corre- sponding pins have not been bonded out of the device. |
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