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LH28F008SA Datasheet(PDF) 16 Page - Sharp Corporation |
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LH28F008SA Datasheet(HTML) 16 Page - Sharp Corporation |
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16 / 35 page ![]() LH28F400SU-NC 4M (512K × 8, 256K × 16) Flash Memory 16 Figure 12. Erase All Unlocked Blocks with Compatible Status Registers 28F400SUT-NC60-10 START (NOTE) BUS OPERATION COMMAND COMMENTS WRITE A7H CSR.7 = 0 YES NO 1 0 1 0 1 CSR FULL STATUS CHECK IF DESIRED OPERATION COMPLETE WRITE D0H CLEAR CSRD RETRY/ERROR RECOVERY (NOTE) ERASE SUCCESSFUL VPP LOW DETECT READ CSRD (see above) SUSPEND ERASE SUSPEND ERASE LOOP CSR.4, 5 = CSR.3 = Write Write Read Standby Erase All Unlocked Blocks Confirm D = A7H A = X D = D0H A = X Q = CSRD Toggle CE or OE to update CSRD A = X CSR Full Status Check can be done after Erase All Unlocked Block, or after a sequence of Erasures. Write FFH after the last operation to reset device to read array mode. See Command Bus Cycle notes for description of codes. NOTE: Where power off or RP is set low during erase operation, 1. Clear CSR.3/4/5 and issue Reset WP command, 2. Retry Erase All Unlocked Block Erase command to erase all blocks, or issue Single Block Erase to erase all of the unlocked blocks in sequence. 3. Set WP command is issued, if necessary. Check CSR.7 1 = WSM Ready 0 = WSM Busy BUS OPERATION COMMAND CSR FULL STATUS CHECK PROCEDURE COMMENTS Standby Standby Check CSR.4, 5 1 = Erase Error 0 = Erase Successful Both 1 = Command Sequence Error CSR.3, 4, 5 should be cleared, if set, before further attempts are initiated. NOTE: If CSR.3 (VPPS) is set to '1', after clearing CSR.3/4/5, 1. Issue Reset WP command, 2. Retry Erase All Unlocked Block Erase command to erase all blocks, or issue Single Block Erase to erase all of the unlocked blocks in sequence. 3. Set WP command is issued, if necessary. If CSR.3 (VPPS) is set to '0', after clearing CSR.3/4/5, 1. Retry Erase All Unlocked Block Erase command. READ COMPATIBLE STATUS REGISTER Check CSR.3 1 = VPP Low Detect 0 = VPP OK |
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