ICS9220 datasheet(6/17 Pages) IDT

Part #	ICS9220

Description	Programmable RambusTM XDRTM Clock Generator

PDF	17 Pages

Scroll/Zoom	100%

Manufacturer	IDT [Integrated Device Technology]

Direct Link	http://www.idt.com

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6 / 17 page

ICS9220

1227G—11/05/07

SMBus Table: VCO Frequency Control Register

Pin #

Name

Control Function

Type

PWD

Bit 7

Reserved

Bit 6

Reserved

Bit 5

N DIV5

Bit 4

N DIV4

Bit 3

N DIV3

Bit 2

N DIV2

Bit 1

N DIV1

Bit 0

N DIV0

SMBus Table: Byte Count Register

Pin #

Name

Control Function

Type

PWD

Bit 7

Bit 6

Bit 5

Bit 4

BC4

Bit 3

BC3

Bit 2

BC2

Bit 1

BC1

Bit 0

BC0

Byte Count

Programming

Reserved

Writing to this register will configure

how many bytes will be read back,

default is 07 = 7 bytes

N Divider Programming

b(5:0)

The decimal representation of M

and N Divider in Byte 5 and 6 will

configure the PLL VCO frequency.

VCO frequency = 100 x

{[NDIV(5:0)+2]/[MDIV(3:0)+2]}

Byte 7

Byte 6

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