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DG409LDY Datasheet(PDF) 1 Page - Vishay Siliconix |
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DG409LDY Datasheet(HTML) 1 Page - Vishay Siliconix |
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1 / 15 page ![]() Vishay Siliconix DG408L, DG409L Document Number: 71342 S11-1066-Rev. G, 30-May-11 www.vishay.com 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Precision 8-Ch/Dual 4-Ch Low Voltage Analog Multiplexers DESCRIPTION The DG408L, DG409L are low voltage pin-for-pin compatible companion devices to the industry standard DG408, DG409 with improved performance. Using BiCMOS wafer fabrication technology allows the DG408L, DG409L to operate on single and dual supplies. Single supply voltage ranges from 3 V to 12 V while dual supply operation is recommended with ± 3 V to ± 6 V. The DG408L is an 8 channel single-ended analog multiplexer designed to connect one of eight inputs to a common output as determined by a 3 bit binary address (A0, A1, A2). The DG409L is a dual 4 channel differential analog multiplexer designed to connect one of four differential inputs to a common dual output as determined by its 2 bit binary address (A0, A1). Break-before-make switching action to protect against momentary crosstalk between adjacent channels. The DG408L, DG409L provides lower on-resistance, faster switching time, lower leakage, less power consumption and higher off-Isolation than the DG408, DG409. FEATURES • Halogen-free according to IEC 61249-2-21 Definition • Pin-for-pin compatibility with DG408, DG409 • 2.7 V to 12 V single supply or ± 3 V to ± 6 V dual supply operation • Lower on-resistance: RDS(ON) - 17 typ. • Fast switching: tON - 38 ns, tOFF - 18 ns • Break-before-make guaranteed • Low leakage: IS(off) - 0.2 nA max. • Low charge injection: 1 pC • TTL, CMOS, LV logic (3 V) compatible • 82 dB off-isolation at 1 MHz • 2000 V ESD protection (HBM) • Compliant to RoHS Directive 2002/95/EC BENEFITS • High accuracy • Single and dual power rail capacity • Wide operating voltage range • Simple logic interface APPLICATIONS • Data acquisition systems • Battery operated equipment • Portable test equipment • Sample and hold circuits • Communication systems •SDSL, DSLAM • Audio and video signal routing FUNCTIONAL BLOCK DIAGRAMS AND PIN CONFIGURATIONS * Pb containing terminations are not RoHS compliant, exemptions may apply A0 Da A1 Db EN GND V- V+ S1a S1b S2a S2b S3a S3b S4a S4b Decoders/Drivers 1 2 3 4 5 6 7 16 15 14 13 12 11 10 Top View 89 DG409L Dual-In- Line, SOIC and TSSOP S3 A0 S6 D S4 A1 S8 S7 EN A2 V- GND S1 V+ S2 S5 Decoders/Drivers 1 2 3 4 5 6 7 16 15 14 13 12 11 10 Top View 89 DG408L Dual-In- Line, SOIC and TSSOP |
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