ICS9DS400 datasheet(1/19 Pages) IDT

Part #	ICS9DS400

Description	Four Output Differential Buffer for PCIe Gen 2 with Spread

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Manufacturer	IDT [Integrated Device Technology]

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ICS9DS400

IDTTM/ICSTM Four Output Differential Buffer for PCIe Gen 2 with Spread

1626

09/17/09

Four Output Differential Buffer for PCIe Gen 2 with Spread

Advance Information

1

General Description

Output Features

The 9DS400 is pin compatible to the 9DB403, but adds the

ability to inject spread spectrum onto the incoming differential

clock, while maintaining good phase noise.

•

4 - 0.7V current-mode differential output pairs.

•

Supports Spread Injection mode and fanout mode.

•

Two pin selectable down spread amounts: 0.5% and

0.25%.

•

50-110 MHz operation in PLL mode

•

50-400 MHz operation in Bypass mode

Functional Block Diagram

Key Specifications

•

Output cycle-cycle jitter < 50ps

•

Output to Output skew <50ps

•

Phase jitter: PCIe Gen1 < 86ps peak to peak

•

Phase jitter: PCIe Gen2 < 3.0/3.1ps rms

Features/Benefits

•

Bypass mode

•

Supports undriven differential outputs in PD# and

SRC_STOP# modes for power management.

Recommended Application

DB400 where spread spectrum needs to be added to the

incoming clock.

STOP

LOGIC

SRC_IN

SRC_IN#

DIF(6,5,2,1))

CONTROL

LOGIC

BYPASS#_SSCG

SDATA

SCLK

PD

Spread

Generating

PLL

4

IREF

OE(6,1)#

2

DIF_STOP

SPREAD_EN

M

U

X

Polarities shown assuming that OE_INV = 1

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ICS9DS400 Datasheet(PDF) 1 Page - Integrated Device Technology

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