74AUP2G08

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Product data sheet

Rev. 5 — 1 December 2011

3 of 21

NXP Semiconductors

74AUP2G08

Low-power dual 2-input AND gate

6.

Pinning information

6.1 Pinning

6.2 Pin description

Fig 4.

Pin configuration SOT765-1

Fig 5.

Pin configuration SOT833-1, SOT1089,

SOT1116 and SOT1203

74AUP2G08

1A

1B

1Y

2Y

2B

GND

2A

001aae236

1

2

3

4

6

5

8

7

74AUP2G08

2B

1Y

2A

2Y

1B

1A

GND

001aae237

36

27

18

45

Transparent top view

Fig 6.

Pin configuration SOT996-2

Fig 7.

Pin configuration SOT902-1

001aai215

74AUP2G08

Transparent top view

8

7

6

5

1

2

3

4

1A

1B

2Y

GND

1Y

2B

2A

001aae357

1B

2B

1A

2Y

1Y

2A

Transparent top view

3

6

1

5

7

2

terminal 1

index area

74AUP2G08

Table 3.

Pin description

Symbol

Pin

Description

SOT765-1, SOT833-1, SOT1089,

SOT996-2, SOT1116 and SOT1203

SOT902-1

1A, 2A

1, 5

7, 3

data input

1B, 2B

2, 6

6, 2

data input

GND

4

4

ground (0 V)

1Y, 2Y

7, 3

1, 5

data output

8

8

supply voltage