ADV7181DWBCPZ datasheet(4/24 Pages) AD

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ADV7181D

Data Sheet

Rev. 0 | Page 4 of 24

SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

AVDD = 3.15 V to 3.45 V, DVDD = 1.65 V to 2.0 V, DVDDIO = 3.0 V to 3.6 V, PVDD = 1.71 V to 1.89 V, nominal input range = 1.6 V. TMIN

to TMAX = −40°C to +85°C, unless otherwise noted. The minimum and maximum specifications are guaranteed over this temperature range.

Table 1.

Parameter1

Symbol

Test Conditions/Comments

Min

Typ

Max

Unit

STATIC PERFORMANCE2, 3

Resolution (Each ADC)

Bits

Integral Nonlinearity

INL

BSL at 27 MHz (10-bit level)

±0.6

±2.5

LSB

BSL at 54 MHz (10-bit level)

−0.6/+0.7

LSB

BSL at 74 MHz (10-bit level)

±1.4

LSB

Differential Nonlinearity

DNL

At 27 MHz (10-bit level)

−0.2/+0.25

−0.99/+2.5

LSB

At 54 MHz (10-bit level)

−0.2/+0.25

LSB

At 74 MHz (10-bit level)

±0.9

LSB

DIGITAL INPUTS

Input High Voltage4

VIH

HS_IN, VS_IN low trigger mode

0.7

Input Low Voltage5

VIL

0.8

HS_IN, VS_IN low trigger mode

0.3

Input Current

IIN

−10

+10

μA

Input Capacitance6

CIN

DIGITAL OUTPUTS

Output High Voltage7

VOH

ISOURCE = 0.4 mA

2.4

Output Low Voltage7

VOL

ISINK = 3.2 mA

0.4

High Impedance Leakage Current

ILEAK

Pin 1

μA

All other output pins

μA

Output Capacitance6

COUT

POWER REQUIREMENTS6

Digital Core Power Supply

DVDD

1.65

1.8

2.0

Digital I/O Power Supply

DVDDIO

3.0

3.3

3.6

PLL Power Supply

PVDD

1.71

1.8

1.89

Analog Power Supply

AVDD

3.15

3.3

3.45

Digital Core Supply Current

IDVDD

CVBS input sampling at 54 MHz

105

Graphics RGB sampling at 75 MHz

SCART RGB FB sampling at 54 MHz

106

Digital I/O Supply Current

IDVDDIO

CVBS input sampling at 54 MHz

Graphics RGB sampling at 75 MHz

PLL Supply Current

IPVDD

CVBS input sampling at 54 MHz

Graphics RGB sampling at 75 MHz

Analog Supply Current8

IAVDD

CVBS input sampling at 54 MHz

Graphics RGB sampling at 75 MHz

166

SCART RGB FB sampling at 54 MHz

200

Power-Down Current

IPWRDN

2.25

Green Mode Power-Down

IPWRDNG

Synchronization bypass function

Power-Up Time

tPWRUP

1 All specifications are obtained using the Analog Devices, Inc., recommended programming scripts.

2 All ADC linearity tests performed at input range of full scale − 12.5% and at zero scale + 12.5%.

3 Maximum INL and DNL specifications obtained with part configured for component video input.

4 To obtain specified VIH level on Pin 22, program Register 0x13 (WO) with a value of 0x04. If Register 0x13 is programmed with a value of 0x00, then VIH on Pin 22 is 1.2 V.

5 To obtain specified VIL level on Pin 22, program Register 0x13 (WO) with a value of 0x04. If Register 0x13 is programmed with a value of 0x00, then VIL on Pin 22 is 0.4 V.

6 Guaranteed by characterization.

7 VOH and VOL levels obtained using default drive strength value (0xD5) in Register Subaddress 0xF4.

8 For CVBS current measurements only, ADC0 is powered up. For RGB current measurements only, ADC0, ADC1, and ADC2 are powered up. For SCART FB current

measurements, all four ADCs are powered up.

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