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EDJ8232E5MB Datasheet(PDF) 21 Page - Elpida Memory

Part # EDJ8232E5MB
Description  8G bits DDR3L SDRAM, DDP
PDF  142 Pages
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Manufacturer  ELPIDA [Elpida Memory]
Direct Link  http://www.elpida.com/en
Logo ELPIDA - Elpida Memory

EDJ8232E5MB Datasheet(HTML) 21 Page - Elpida Memory

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EDJ8232E5MB
Data Sheet E1813E40 (Ver. 4.0)
21
AC and DC Output Measurement Levels (TC = 0
C to +85C, VDD, VDDQ = 1.283V to 1.45V)
Parameter
Symbol
Specification
Unit
Notes
DC output high measurement level
(for IV curve linearity)
VOH (DC)
0.8
 VDDQ
V
DC output middle measurement level
(for IV curve linearity)
VOM (DC)
0.5
 VDDQ
V
DC output low measurement level
(for IV curve linearity)
VOL (DC)
0.2
 VDDQ
V
AC output high measurement level
(for output slew rate)
VOH (AC)
VTT + 0.1
 VDDQ
V
1
AC output low measurement level
(for output slew rate)
VOL (AC)
VTT
 0.1  VDDQ
V
1
AC differential output high measurement
level (for output slew rate)
VOHdiff
0.2
 VDDQ
V
2
AC differential output low measurement level
(for output slew rate)
VOLdiff
0.2  VDDQ
V
2
AC differential cross point voltage
VOX (AC)
TBD
mV
Notes: 1. The swing of
0.1  VDDQ is based on approximately 50% of the static single-ended output high or low
swing with a driver impedance of 34
 and an effective test load of 25 to VTT = VDDQ/2 at each of the
differential outputs.
2. The swing of
0.2  VDDQ is based on approximately 50% of the static single-ended output high or low
swing with a driver impedance of 34
 and an effective test load of 25 to VTT = VDDQ/2 at each of the
differential outputs.
Output Slew Rate Definitions
[Single-Ended Output Slew Rate Definition]
Measured
Description
From
To
Defined by
Output slew rate for rising edge
VOL (AC)
VOH (AC)
VOH (AC) – VOL (AC)
TRse
Output slew rate for falling edge
VOH (AC)
VOL (AC)
VOH (AC) – VOL (AC)
TFse
TRse
TFse
VOH (AC)
VOL (AC)
TFse
Falling slew =
VOH (AC)
VOL (AC)
VTT
VOH (AC)
VOL (AC)
TRse
Rising slew =
Output Slew Rate Definition for Single-Ended Signals



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