SN74LVTH16374EP

3.3V ABT 16BIT EDGETRIGGERED DTYPE FLIPFLOP

WITH 3STATE OUTPUTS

SCBS779A − NOVEMBER 2003 – OCTOBER 2004

4

POST OFFICE BOX 655303

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP†

MAX

UNIT

VIK

VCC = 2.7 V,

II = −18 mA

−1.2

V

VCC = 2.7 V to 3.6 V,

IOH = −100 µA

VCC − 0.2

VOH

VCC = 2.7 V,

IOH = −8 mA

2.4

V

VOH

VCC = 3 V,

IOH = −32 mA

2

V

VCC = 2.7 V

IOL = 100 µA

0.2

VCC = 2.7 V

IOL = 24 mA

0.5

VOL

IOL = 16 mA

0.4

V

VOL

VCC = 3 V

IOL = 32 mA

0.5

V

VCC = 3 V

IOL = 64 mA

0.55

VCC = 0 or 3.6 V,

VI = 5.5 V

10

II

Control inputs

VCC = 3.6 V,

VI = VCC or GND

±1

A

II

Data inputs

VCC = 3.6 V

VI = VCC

1

µA

Data inputs

VCC = 3.6 V

VI = 0

−5

Ioff

VCC = 0,

VI or VO = 0 to 4.5 V

±100

µA

VCC = 3 V

VI = 0.8 V

75

II(hold)

Data inputs

VCC = 3 V

VI = 2 V

−75

µA

II(hold)

Data inputs

VCC = 3.6 V‡,

VI = 0 to 3.6 V

±500

µA

IOZH

VCC = 3.6 V,

VO = 3 V

5

µA

IOZL

VCC = 3.6 V,

VO = 0.5 V

−5

µA

IOZPU

VCC = 0 to 1.5 V, VO = 0.5 V to 3 V, OE = don’t care

±100

µA

IOZPD

VCC = 1.5 V to 0, VO = 0.5 V to 3 V, OE = don’t care

±100

µA

Outputs high

0.19

ICC

VCC = 3.6 V, IO = 0, VI = VCC or GND

Outputs low

5

mA

ICC

VCC = 3.6 V, IO = 0, VI = VCC or GND

Outputs disabled

0.19

mA

∆ICC§

VCC = 3 V to 3.6 V, One input at VCC − 0.6 V, Other inputs at VCC or GND

0.2

mA

Ci

VI = 3 V or 0

3

pF

Co

VO = 3 V or 0

9

pF

† All typical values are at VCC = 3.3 V, TA = 25°C.

‡ This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to another.

§ This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.

timing requirements over recommended operating free-air temperature range (unless otherwise

noted) (see Figure 1)

VCC = 3.3

± 0.3 V

VCC = 2.7 V

UNIT

MIN

MAX

MIN

MAX

UNIT

fclock

Clock frequency

160

160

MHz

tw

Pulse duration, CLK high or low

3

3

ns

tsu

Setup time, data before CLK

↑

High or low

1.8

2

ns

th

Hold time, data after CLK

↑

High or low

0.8

0.1

ns