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SN8A1702AX Datasheet(PDF) 79 Page - SONiX Technology Company |
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SN8A1702AX Datasheet(HTML) 79 Page - SONiX Technology Company |
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79 / 112 page ![]() Preliminary SN8P1702A/SN8P1703A 8-bit micro-controller build-in 12-bit ADC SONiX TECHNOLOGY CO., LTD Page 79 Revision 0.5 9 9 9 INTERRUPT OVERVIEW The SN8P1702A/SN8P1703A provides 3 interrupt sources, including two internal interrupts (TC0, TC1) and one external interrupts (INT0 ). The external interrupt can wakeup the chip from power down mode to high-speed normal mode. The external clock input pins of INT0 are shared with P0.0 pins. Once interrupt service is executed, the GIE bit in STKP register will clear to “0” for stopping other interrupt request. When interrupt service exits, the GIE bit will set to “1” to accept the next interrupts’ request. All of the interrupt request signals are stored in INTRQ register. The user can program the chip to check INTRQ’s content for setting executive priority. Figure 9-1. The 7 Interrupts Note: The GIE bit must enable and all interrupt operations work. INTRQ 3-bit Latchs TC0IRQ TC1IRQ P00IRQ Interrupt enable gating Global interrupt request signal Interrupt vector address (0008H) TC0 time out TC1 time out INTEN Interrupt enable reg ister INT0 trigger INTRQ 3-bit Latchs TC0IRQ TC1IRQ P00IRQ Interrupt enable gating Global interrupt request signal Interrupt vector address (0008H) TC0 time out TC1 time out INTEN Interrupt enable reg ister INT0 trigger |
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