TS2PCIE412RUAR datasheet(4/17 Pages) TI1

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TS2PCIE412

SCDS269C – MARCH 2009 – REVISED APRIL 2010

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ELECTRICAL CHARACTERISTICS FOR 1.8-V SUPPLY

(1)

VDD = 1.5 V to 2.0 V, TA = –40°C to 85°C (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP(2)

MAX

UNIT

VIK

SEL

VDD = 2.0 V,

IIN = –18 mA

–0.7

–1.3

IIH

SEL

VDD = 2.0 V,

VIN = VDD

±1

IIL

SEL

VDD =2.0 V,

VIN = GND

±1

Ioff

VDD = 0,

VO = 0 to 2 V,

VI = 0

ICC

VDD = 2.0 V,

II/O = 0,

Switch ON or OFF

200

400

CIN

SEL

f = 10 MHz, VIN = 0 V

COFF

B port

VI = 0 V, f = 10 MHz,

Outputs open,

Switch OFF

1.5

CON

VI = 0 V, f = 10 MHz,

Outputs open,

Switch ON

4.5

rON

VDD = 1.8 V,

GND

≤ VI ≤ VDD,

IO = –40 mA

Ω

rON(flat)

VDD = 1.8 V,

VI = 1.65 to 1.8 V,

IO = –40 mA

0.5

Ω

(3)

ΔrON

(4)

VDD = 1.8 V,

GND

≤ VI ≤ VDD,

IO = –40 mA

0.2

0.8

Ω

Dynamic

RL = 100 Ω, f = 10 MHz

–81

XTALK

See Figure 9

RL = 100 Ω, f = 1.25 GHz

–32

RL = 100 Ω, f = 10 MHz

–74

OIRR

See Figure 10

RL = 100 Ω, f = 1.25 GHz

–36

RL = 50 Ω,

See Figure 8

2.1

GHz

Max data rate

RL = 50 Ω,

See Figure 8

4.2

Gbps

(1)

VI, VO, II, and IO refer to I/O pins. VIN refers to the control inputs.

(2)

All typical values are at VDD = 1.8 V (unless otherwise noted), TA = 25°C.

(3)

rON(flat) is the difference of rON in a given channel at specific voltages.

(4)

ΔrON is the difference of ron from center ports to any other port.

SWITCHING CHARACTERISTICS

over recommended operating free-air temperature range, VDD = 1.5 V to 2.0 V, RL = 200 Ω, CL = 10 pF

(unless otherwise noted)

FROM

PARAMETER

MIN

TYP(1)

MAX

UNIT

(INPUT)

(OUTPUT)

tpd

(2) (3)

An or nBn

nBn or An

0.28

tPZH, tPZL

SEL

An or nBn

7.8

tPHZ, tPLZ

SEL

An or nBn

2.5

tsk(O)

(4)

An or nBn

nBn or An

0.06

0.1

tsk(p)

(5) (6)

0.06

0.1

(1)

All typical values are at VDD = 1.8 V (unless otherwise noted) TA = 25°C.

(2)

The propagation delay is the calculated RC time constant of the typical ON-state resistance of the switch and the specified load

capacitance when driven by an ideal voltage source (zero output impedance).

(3)

See Figure 6

(4)

Output skew between center port to any other port

(5)

Skew between opposite transitions of the same output in a given device

tPHL – tPLH

(6)

See Figure 7

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