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TNETE110PM Datasheet(PDF) 1 Page - Texas Instruments |
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TNETE110PM Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 26 page ![]() ThunderLAN ™ TNETE110PM PCI ETHERNET ™ CONTROLLER SINGLE-CHIP 10 BASE-T SPWS029 – SEPTEMBER 1996 1 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 D Single-Chip Ethernet™ Adapter for the Peripheral Component Interconnect (PCI) Local Bus – 32-Bit PCI† Glueless Host Interface – Compliant With PCI Local-Bus Specification (Revision 2.1) – 33-MHz Operation – 3-V or 5-V I/O Operation – Adaptive Performance Optimization ™ (APO) for Highest Available PCI Bandwidth – High-Performance Bus Master Architecture With Byte-Aligning Direct Memory Access (DMA) Controller for Low Host CPU and Bus Utilization – Plug-and-Play Compatible D Supports 32-Bit Data Streaming on PCI Bus – Time Division Multiplexed SRAM – 2-Gbps Internal Bandwidth D Driver Compatible With All Previous ThunderLAN Components D Switched-Ethernet Compatible D Full-Duplex Compatible – Independent Transmit and Receive Channels – Two Transmit Channels for Demand Priority D No On-Board Memory Required D Auto-Negotiation (N-Way) Compatible D Supports the Card Bus CIS Pointer Register D Early-Receive-Interrupt Count Register D Hardware Statistics Registers for Management-Information Base (MIB) D Integrated 10 Base-T, and 10 Base-5 Attachment Unit Interface (AUI) Physical Layer Interface – Single-Chip IEEE 802.3 and Blue Book Ethernet-Compliant Solution – DSP-Based Digital Phase-Locked Loop – Smart Squelch Allows for Transparent Link Testing – Transmission Waveshaping – Autopolarity (Reverse Polarity Correction) – External/Internal Loopback Including Twisted Pair and AUI – 10 Base-2 Supported Via AUI Interface D Magic Packet™ Remote Wake-Up Scheme D Microsoft™ Advanced Power Management – PCI Specification Compatible for Low Power/Sleep Mode – Advanced Configuration and Power Interface (ACPI) D Low-Power CMOS Technology – Green PC Compatible D EEPROM Interface Supports Jumperless Design and Autoconfiguration D DMTF (Desktop Management Task Force) Compatible D IEEE Standard 1149.1‡ Test-Access Port (JTAG) D 144-Pin Thin Quad Flat Packages and Quad Flat Packages (PCM and PGE Suffix) Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. ADVANCE INFORMATION concerns new products in the sampling or preproduction phase of development. Characteristic data and other specifications are subject to change without notice. Copyright © 1996, Texas Instruments Incorporated † The PCI Local-Bus Specification, Revision 2.1 should be used as a reference with this document. ‡ IEEE Standard 1149.1–1990, IEEE Standard Test-Access Port and Boundary-Scan Architecture ThunderLAN and Adaptive Performance Optimization are trademarks of Texas Instruments Incorporated. Ethernet is a trademark of Xerox Corporation. Microsoft is a trademark of Microsoft Corporation. Magic Packet is a trademark of Advanced Micro Devices Corporation. |
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