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TNETE110PM Datasheet(PDF) 12 Page - Texas Instruments |
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TNETE110PM Datasheet(HTML) 12 Page - Texas Instruments |
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12 / 26 page ![]() ThunderLAN ™ TNETE110PM PCI ETHERNET ™ CONTROLLER SINGLE-CHIP 10 BASE-T SPWS029 – SEPTEMBER 1996 12 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 absolute maximum ratings over operating case temperature range (unless otherwise noted)† Supply voltage range, VDD (see Note 2) – 0.5 V to 7 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input voltage range (see Note 2) – 0.5 V to 7 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output voltage range – 0.5 V to 7 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power dissipation TBD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating case temperature range, TC 0 °C to 95°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Storage temperature range, Tstg –65 °C to 150°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 2: Voltage values are with respect to VSS, and all VSS pins should be routed so as to minimize inductance to system ground. The recommended operating conditions and the electrical characteristics tables are divided into groups, depending on pin function: D PCI-interface pins D Logic pins D Physical layer pins The PCI signal pins are operated in one of two modes shown in the PCI tables. D 5-V signal mode D 3-V signal mode recommended operating conditions (PCI-interface pins) (see Note 3) 3-V SIGNALING OPERATION 5-V SIGNALING OPERATION UNIT MIN NOM MAX MIN NOM MAX VDD Supply voltage (PCI) 3 3.3 3.6 4.75 5 5.25 V VIH High-level input voltage 0.5 VDD VDD + 0.5 2.0 VDD + 0.5 V VIL Low-level input voltage, TTL-level signal (see Note 4) – 0.5 0.3 VDD – 0.5 0.8 V IOH High-level output current TTL outputs – 0.5 –2 mA IOL Low-level output current (see Note 5) TTL outputs 1.5 6 mA TC Operating case temperature 0 95 0 95 °C Tstg Storage temperature – 65 150 – 65 6 °C NOTES: 3. PCI interface pins include VDDI, PCLKRUN, PFRAME, PTRDY, PIRDY, PSTOP, PDEVSEL, PIDSEL, PPERR, PSERR, PREQ, PGNT, PCLK, PPAR, PRST, PINTA, PAD[31:0], PC/BE[3:0], TRST, TMS, TCLK, TDO, TDI. 4. The algebraic convention, where the more negative (less positive) limit is designated as a minimum, is used for logic-voltage levels only. 5. Output current of 2 mA is sufficient to drive five low-power Schottky TTL loads or ten advanced low-power Schottky TTL loads (worst case). |
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