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TS4999 Datasheet(PDF) 26 Page - STMicroelectronics |
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TS4999 Datasheet(HTML) 26 Page - STMicroelectronics |
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26 / 36 page ![]() Application information TS4999 26/36 4.5 Circuit decoupling Power supply capacitors, referred to as CS, CSL and CSR, are needed to correctly bypass the TS4999. The TS4999 has a typical switching frequency of 280 kHz and an output fall and rise time of approximately 5 ns. Due to these very fast transients, careful decoupling is mandatory. A 1 µF ceramic capacitor between each PVCC and PGND (CSL, CSR) and one additional ceramic capacitor between AVCC and AGND 0.1 µF (CS) are sufficient, but they must be located as close as possible to the TS4999 in order to avoid any extra parasitic inductance or resistance created by a long track wire. Parasitic loop inductance, in relation to di/dt, introduces overvoltage that decreases the global efficiency of the device and may cause, if this parasitic inductance is too high, the device to break down. In addition, even if a ceramic capacitor has an adequate high frequency ESR (equivalent series resistance) value, its current capability is also important. A 0603 size is a good compromise, particularly when a 4 Ω load is used. Another important parameter is the rated voltage of the capacitor. A 1 µF/6.3 V capacitor used at 5 V, loses about 50% of its value. With a power supply voltage of 5 V, the decoupling value, instead of 1 µF, could be reduced to 0.5 µF. As CS has particular influence on the THD+N in the medium-to-high frequency region, this capacitor variation becomes decisive. In addition, less decoupling means higher overshoots which can be problematic if they reach the power supply AMR value (6 V). 4.6 Wakeup (tWU) and shutdown (tSTBY) times During the wake-up sequence, there is a delay when the standby is released to switch the device ON. The wake-up sequence of the TS4999 consists of two phases. During the first phase tWU-A, a digitally-generated delay, mutes the outputs. Then, the gain increasing- phase tWU-A begins. The gain increases smoothly from the mute state to the preset gain selected by the digital pins G0 and G1. This startup sequence avoid any pop noise during startup of the amplifier. See Figure 57: Wake-up phase |
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