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M24LR64E-R Datasheet(PDF) 50 Page - STMicroelectronics

Part # M24LR64E-R
Description  64-Kbit EEPROM with password protection, dual interface & energy harvesting: 400 kHz I²C bus & ISO 15693 RF protocol at 13.56 MHz
PDF  140 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M24LR64E-R Datasheet(HTML) 50 Page - STMicroelectronics

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Data rate and data coding
M24LR64E-R
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Doc ID 022712 Rev 3
9.3
VCD to M24LR64E-R frames
Frames are delimited by a start of frame (SOF) and an end of frame (EOF). They are
implemented using code violation. Unused options are reserved for future use.
The M24LR64E-R is ready to receive a new command frame from the VCD 311.5 µs (t2)
after sending a response frame to the VCD.
The M24LR64E-R takes a power-up time of 0.1 ms after being activated by the powering
field. After this delay, the M24LR64E-R is ready to receive a command frame from the VCD.
9.4
Start of frame (SOF)
The SOF defines the data coding mode the VCD is to use for the following command frame.
The SOF sequence described in Figure 20 selects the 1 out of 256 data coding mode. The
SOF sequence described in Figure 21 selects the 1 out of 4 data coding mode. The EOF
sequence for either coding mode is described in Figure 22.
Figure 20.
SOF to select 1 out of 256 data coding mode
Figure 21.
SOF to select 1 out of 4 data coding mode
AI06661
37.76µs
9.44µs
9.44µs
37.76µs
AI06660
37.76µs
9.44µs
9.44µs
37.76µs
9.44µs



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