HT32F1765 datasheet(13/45 Pages) HOLTEK

13 / 45 page

Rev. 1.00

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Inter-integrated Circuit – I2C

▀ Support both master and slave mode with a frequency of up to 1MHz

▀ Provide an arbitration function and clock synchronization

▀ Supports 7-bit and 10-bit addressing mode and general call addressing

▀ Supports slave multi-addressing mode with maskable address

The I2C Module is an internal circuit allowing communication with an external I2C interface which

is an industry standard two line serial interface used for connection to external hardware. These

two serial lines are known as a serial data line, SDA, and a serial clock line, SCL. The I2C module

provides three data transfer rates: (1). 100kHz in the Standard mode, (2). 400kHz in the Fast mode

and, (3). 1MHz in the Fast mode plus. The SCL period generation register is used to setup different

kinds of duty cycle implementation for the SCL pulse.

The SDA line which is connected directly to the I2C bus is a bi-directional data line between the

master and slave devices and is used for data transmission and reception. The I2C module also has

an arbitration detect function and clock synchronization to prevent situations where more than one

master attempts to transmit data to the I2C bus at the same time.

Serial Peripheral Interface – SPI

▀ Supports both master and slave mode

▀ Frequency of up to 36MHz for master mode and 18MHz for slave mode

▀ FIFO Depth: 8 levels

▀ Multi-master and multi-slave operation

The Serial Peripheral Interface, SPI, provides an SPI protocol data transmit and receive function

in both master and slave mode. The SPI interface uses 4 pins, which are the serial data input and

output lines MISO and MOSI, the clock line, SCK, and the slave select line, SEL. One SPI device

acts as a master device which controls the data flow using the SEL and SCK signals to indicate the

start of data communication and the data sampling rate. To receive a data byte, the streamed data

bits are latched on a specific clock edge and stored in the data register or in the RX FIFO. Data

transmission is carried in a similar way but with a reverse sequence. The mode fault detection

provides a capability for multi-master applications.

HT32F1765 Datasheet(PDF) 13 Page - Holtek Semiconductor Inc