| Electronic Components Datasheet Search |
|
CXP88340 Datasheet(PDF) 5 Page - Sony Corporation |
|
|
|||||||||||||||||||||||||||||
CXP88340 Datasheet(HTML) 5 Page - Sony Corporation |
|
5 / 34 page ![]() – 5 – CXP88340/88348 AN0 to AN3 PF0/AN4 to PF3/AN7 PF4/AN8 to PF7/AN11 PG0/CFG PG1/DFG PG2/DPG PG3/EC/ INT2 PH0/SCL0 PH1/SCL1 PH2/SDA0 PH3/SDA1 PH4 to PH7 PI0/INT0 PI1 to PI7 RFG0, RFG1 ANOUT CTLFAMPO CTLSAMPI CTLAGND CTLFAMPI (–) CTLFAMPI (+) HEADL (–) HEADL (+) CTLHEAD (–) CTLHEAD (+) AMPVSS AMPVDD Input Input/Input Output/Input Input/Input Input/Input/Input I/O/I/O Output I/O/Input I/O Input Output Output Input Output Input Output I/O Description I/O Description (Port F) Lower 4 bits are for inputs; upper 4 bits are for outputs. Lower 4 bits also serve as standby release input pins. (8 pins) (Port H) 8-bit I/O port. Upper four bits are for outputs. I/O can be set in a unit of single bits for lower four bits. Lower four bits are N-ch open drain outputs and which can drive 12mA sink current. Upper four bits are for outputs; N-ch open drain output of medium drive voltage (12V) and large current (12mA). (8 pins) Input ports. (2 pins) Output port. (1 pin) Output port. (1 pin) Input port. (1 pin) Output port. (1 pin) Input ports. (2 pins) Output ports. (2 pins) I/O ports. (2 pins) Analog signal input circuit GND pin. Analog signal input circuit power supply pin. Input pin to request external interruption. Active when falling edge. (Port I) 8-bit I/O port. I/O can be set in a unit of single bits. Function as standby release input can be set in a unit of single bits. (8 pins) Analog input pin to A/D converter. (12 pins) (Port G) 4-bit input port. (4 pins) Capstan FG input pin. Drum FG input pin. Drum PG input pin. External event input pin for timer/counter. Serial clock (CH2) I/O pin. Serial data (CH2) I/O pin. Input pin to request external interruption. Active when falling edge. Reel FG input pin. Internal waveform output pin of analog circuit. PBCTL signal 1st amplifier output pin. PBCTL signal 2nd amplifier input pin. Smoothing capacitor connecting pin. Input PBCTL signal with capacitor coupled. During playback, connect to CTLHEAD (–) and CTLHEAD (+) with internal switch. During playback, input pin of PBCTL signal; during recording, output pin of PBCTL signal. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |