WM8960CGEFLSLASHV datasheet(74/91 Pages) WOLFSON

74 / 91 page

WM8960

Production Data

PD, October 2011, Rev 4.1

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

2:1

Reserved

NGAT

Noise gate function enable

0 = disable

1 = enable

Automatic Level

Control

R21 (15h)

Left ADC

Volume

ADCVU

N/A

ADC Volume Update

Writing a 1 to this bit will cause left and right

ADC volumes to be updated (LADCVOL and

RADCVOL)

Analogue to

Digital Converter

7:0

LADCVOL[7:0]

11000011

Left ADC Digital Volume Control

0000 0000 = Digital Mute

0000 0001 = -97dB

0000 0010 = -96.5dB

... 0.5dB steps up to

1111 1111 = +30dB

Analogue to

Digital Converter

R22 (16h)

Right ADC

Volume

ADCVU

N/A

ADC Volume Update

Writing a 1 to this bit will cause left and right

ADC volumes to be updated (LADCVOL and

RADCVOL)

Analogue to

Digital Converter

7:0

RADCVOL[7:0]

11000011

Right ADC Digital Volume Control

0000 0000 = Digital Mute

0000 0001 = -97dB

0000 0010 = -96.5dB

... 0.5dB steps up to

1111 1111 = +30dB

Analogue to

Digital Converter

R23 (17h)

Additional

Control (1)

TSDEN

Thermal Shutdown Enable

0 = Thermal shutdown disabled

1 = Thermal shutdown enabled

(TSENSEN must be enabled for this function to

work)

Thermal

Shutdown

7:6

VSEL[1:0]

Analogue Bias Optimisation

00 = Reserved

01 = Increased bias current optimized for

AVDD=2.7V

1X = Lowest bias current, optimized for

AVDD=3.3V

Power

Management

Reserved

DMONOMIX

DAC Mono Mix

0 = Stereo

1 = Mono (Mono MIX output on enabled DACs)

Output Signal

Path

3:2

DATSEL[1:0]

ADC Data Output Select

00: left data = left ADC; right data =right ADC

01: left data = left ADC; right data = left ADC

10: left data = right ADC; right data =right ADC

11: left data = right ADC; right data = left ADC

Analogue to

Digital Converter

TOCLKSEL

Slow Clock Select (Used for volume update

timeouts and for jack detect debounce)

0 = SYSCLK / 2

21 (Slower Response)

1 = SYSCLK / 2

19 (Faster Response)

Volume

Updates;

Headphone Jack

Detect

TOEN

Enables Slow Clock for Volume Update Timeout

and Jack Detect Debounce

0 = Slow clock disabled

1 = Slow clock enabled

Volume

Updates;

Headphone Jack

Detect

R24 (18h)

8:7

Reserved

WM8960CGEFL/V Datasheet(PDF) 74 Page - Wolfson Microelectronics plc

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