WM8524

Production Data

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PD, Rev 4.1, October 2011

12

DEVICE DESCRIPTION

INTRODUCTION

The WM8524 provides high fidelity, 2Vrms ground referenced stereo line output from a single supply

line with minimal external components. The integrated DC servo eliminates the requirement for

external mute circuitry by minimising DC transients at the output during power up/down. The device

is well-suited to both stereo and multi-channel systems.

The device supports all common audio sampling rates between 8kHz and 192kHz using common

MCLK fs rates, with a slave mode audio interface.

The WM8524 supports a simple hardware control mode, allowing access to 24-bit LJ, RJ and I2S

audio interface formats, as well as a mute control.

An internal audio interface clock monitor

automatically mutes the DAC output if the BCLK is interrupted.

DIGITAL AUDIO INTERFACE

The digital audio interface is used for inputting audio data to the WM8524. The digital audio interface

uses three pins:



DACDAT: DAC data input



LRCLK: Left/Right data alignment clock



BCLK: Bit clock, for synchronisation

The WM8524 digital audio interface operates as a slave as shown in Figure 5.

Figure 5 Slave Mode

INTERFACE FORMATS

The WM8524 supports three different audio data formats:



Left justified



Right justified



I

All three of these modes are MSB first. They are described in Audio Data Formats on page 13. Refer

to the “Electrical Characteristics” section for timing information.