41594B datasheet(248/372 Pages) MICROCHIP

248 / 372 page

A7 A6 A5 A4 A3 A2 A1

SDA

SCL

Bus master

terminates

transfer

ACK

Receiving Data from Slave

ACK

R/W

Transmit Address to Slave

SSP1IF

ACK is not sent

Write to SSP1CON2<0>(SEN = 1),

Write to SSP1BUF occurs here,

ACK from Slave

Master configured as a receiver

by programming SSP1CON2<3> (RCEN = 1)

PEN bit = 1

written here

Data shifted in on falling edge of CLK

Cleared by software

start XMIT

SEN = 0

SSP1OV

SDA = 0, SCL = 1

while CPU

(SSP1STAT<0>)

ACK

Cleared by software

Set SSP1IF interrupt

at end of receive

Set P bit

(SSP1STAT<4>)

and SSP1IF

Cleared in

software

ACK from Master

Set SSP1IF at end

Set SSP1IF interrupt

at end of Acknowledge

sequence

Set SSP1IF interrupt

at end of Acknow-

ledge sequence

of receive

Set ACKEN, start Acknowledge sequence

SSP1OV is set because

SSP1BUF is still full

SDA = ACKDT = 1

RCEN cleared

automatically

RCEN = 1, start

next receive

Write to SSP1CON2<4>

to start Acknowledge sequence

SDA = ACKDT (SSP1CON2<5>) = 0

RCEN cleared

automatically

responds to SSP1IF

ACKEN

begin Start condition

Cleared by software

SDA = ACKDT = 0

Last bit is shifted into SSP1SR and

contents are unloaded into SSP1BUF

RCEN

Master configured as a receiver

by programming SSP1CON2<3> (RCEN = 1)

RCEN cleared

automatically

ACK from Master

SDA\ = ACKDT = 0

RCEN cleared

automatically

41594B Datasheet(PDF) 248 Page - Microchip Technology

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