41594B datasheet(252/372 Pages) MICROCHIP

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PIC12LF1840T48A

DS41594B-page 252

Preliminary

 2011-2012 Microchip Technology Inc.

25.6.13.1

Bus Collision During a Start

Condition

During a Start condition, a bus collision occurs if:

SDA or SCL are sampled low at the beginning of

the Start condition (Figure 25-32).

SCL is sampled low before SDA is asserted low

(Figure 25-33).

During a Start condition, both the SDA and the SCL

pins are monitored.

If the SDA pin is already low, or the SCL pin is already

low, then all of the following occur:

• the Start condition is aborted,

• the BCL1IF flag is set and

• the MSSP1 module is reset to its Idle state

(Figure 25-32).

The Start condition begins with the SDA and SCL pins

deasserted. When the SDA pin is sampled high, the

Baud Rate Generator is loaded and counts down. If the

SCL pin is sampled low while SDA is high, a bus colli-

sion occurs because it is assumed that another master

is attempting to drive a data ‘1’ during the Start

condition.

If the SDA pin is sampled low during this count, the

BRG is reset and the SDA line is asserted early

(Figure 25-34). If, however, a ‘1’ is sampled on the SDA

pin, the SDA pin is asserted low at the end of the BRG

count. The Baud Rate Generator is then reloaded and

counts down to zero; if the SCL pin is sampled as ‘0’

during this time, a bus collision does not occur. At the

end of the BRG count, the SCL pin is asserted low.

FIGURE 25-33:

BUS COLLISION DURING START CONDITION (SDA ONLY)

Note:

The reason that bus collision is not a fac-

tor during a Start condition is that no two

bus masters can assert a Start condition

at the exact same time. Therefore, one

master will always assert SDA before the

other. This condition does not cause a bus

collision because the two masters must be

allowed to arbitrate the first address fol-

lowing the Start condition. If the address is

the same, arbitration must be allowed to

continue into the data portion, Repeated

Start or Stop conditions.

SDA

SCL

SEN

SDA sampled low before

SDA goes low before the SEN bit is set.

S bit and SSP1IF set because

SSP1 module reset into Idle state.

SEN cleared automatically because of bus collision.

S bit and SSP1IF set because

Set SEN, enable Start

condition if SDA = 1, SCL = 1

SDA = 0, SCL = 1.

BCL1IF

SSP1IF

SDA = 0, SCL = 1.

SSP1IF and BCL1IF are

cleared by software

SSP1IF and BCL1IF are

cleared by software

Set BCL1IF,

Start condition. Set BCL1IF.

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