MSC8152 datasheet(34/68 Pages) FREESCALE

34 / 68 page

MSC8152 Dual-Core Digital Signal Processor Data Sheet, Rev. 5

Electrical Characteristics

Freescale Semiconductor

2.5.3.4

DC-Level Requirements for SGMII Configurations

Note:

Specifications are valid at the recommended operating conditions listed in Table 3

Table 15 describes the SGMII SerDes transmitter AC-coupled DC electrical characteristics. Transmitter DC characteristics are

measured at the transmitter outputs (SR[1–2]_TX[n] and SR[1–2]_TX[n]) as shown in Figure 10.

Table 14. Serial RapidIO Receiver DC Specifications

Parameter

Symbol

Min

Typical

Max

Units

Notes

Differential input voltage

VIN

200

—

1600

mVp-p

Notes:

Measured at receiver.

Table 15. SGMII DC Transmitter Electrical Characteristics

Parameter

Symbol

Min

Typ

Max

Unit

Notes

Output high voltage

VOH

——

XVDD_SRDS-Typ/2 + |VOD|-max/2

Output low voltage

VOL

XVDD_SRDS-Typ/2 – |VOD|-max/2

—

Output differential

voltage (XVDD-Typ at

1.0 V)

|VOD|

323

500

725

2,3,4

296

459

665

2,3,5

269

417

604

2,3,6

243

376

545

2,3,7

215

333

483

2,3,8

189

292

424

2,3,9

162

250

362

2,3,10

Output impedance

(single-ended)

—

Notes:

This does not align to DC-coupled SGMII. XVDD_SRDS2-Typ = 1.1 V.

The |VOD| value shown in the table assumes full multitude by setting srd_smit_lvl as 000 and the following transmit

equalization setting in the XMITEQAB (for lanes A and B) or XMITEQEF (for lanes E and F) bit field of Control Register:

• The MSB (bit 0) of the above bit field is set to zero (selecting the full VDD-DIFF-p-p amplitude which is power up default);

• The LSB (bit [1–3]) of the above bit field is set based on the equalization settings listed in notes 4 through 10.

The |VOD| value shown in the Typ column is based on the condition of XVDD_SRDS2-Typ = 1.0 V, no common mode offset

variation (VOS =500mV), SerDes transmitter is terminated with 100-Ω differential load between

Equalization setting: 1.0x: 0000.

Equalization setting: 1.09x: 1000.

Equalization setting: 1.2x: 0100.

Equalization setting: 1.33x: 1100.

Equalization setting: 1.5x: 0010.

Equalization setting: 1.71x: 1010.

10. Equalization setting: 2.0x: 0110.

11. |VOD| = |VSR[1–2]_TXn– VSR[1–2]_TXn|. |VOD| is also referred to as output differential peak voltage. VTX-DIFFp-p = 2*|VOD|.

MSC8152 Datasheet(PDF) 34 Page - Freescale Semiconductor, Inc

MSC8152 Datasheet(HTML) 34 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68

Datasheet Download

Link URL