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KTPFPGMEVMEUG Datasheet(PDF) 6 Page - Freescale Semiconductor, Inc |
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KTPFPGMEVMEUG Datasheet(HTML) 6 Page - Freescale Semiconductor, Inc |
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6 / 48 page ![]() VPGM SDA SCL 1 2 3 4 5 6 7 8 9 10 11 12 13 14 42 41 40 39 38 37 36 35 34 33 32 31 30 29 INTB PMPF0100 SDWNB RESETBMCU STANDBY ICTEST SW1FB SW1AIN SW1ALX SW1BLX SW1BIN SW1CLX SW1CIN SW1CFB SW1VSSSNS LICELL VGEN6 VIN3 VGEN5 SW3AFB SW3AIN SW3ALX SW3BLX SW3BIN SW3BFB SW3VSSSNS VREFDDR VINREFDDR VHALF CPGM C1 C2 C3 C4 PROGRAMMING INTERFACE C1 = 0.1 uF, 20 V, ceramic C2 = 1.0 uF, 20 V, ceramic C3 = 0.1 uF, 20 V, ceramic C4 = 1.0 uF, 20 V, ceramic Optional: 3.0 V Lithium-Ion Coin Cell Allows “Try-Before-Buy” For Development R2 R1 4.7 K 4.7 K C5 CPGM = 20 uF, 20 V, ceramic C5 = 0.1 uF, 20 V, ceramic To Processor I2C Interface V3.3 GND GPIO2 GPIO1 PWRON R3 10 K 1 2 3 4 5 6 7 8 R4 10 K R5 R6 0 0 System VIN (3.1V to 4.5V) + - KTPFPGMEVMEUG, Rev. 2.0 6 Freescale Semiconductor Software and Hardware Requirements Figure 4. PF100 Minimum System for Programming |
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