LTP5900 Mote Datasheet

Dust Networks

7

Pin

Number

Pin Name

Description

I/O Type

Direction

Pin State in

7

MT_RTS

¯¯¯¯¯¯¯

UART active low mote ready to

send

1

Out

8

MT_CTS

¯¯¯¯¯¯¯

UART active low mote clear to

send

1

Out

9

SP_CTS

¯¯¯¯¯¯¯

UART active low serial peripheral

clear to send

1

In

–

10

TIME

¯¯¯¯

Falling edge time request

1

In

–

11

Mode_pin_B

Selects between Mode 1 & Mode

3 operation

1

In

–

12

FLASH_P_EN

¯¯¯¯¯¯¯¯¯¯¯¯

Active low flash power enable

1

In

–

13

Reserved

No connect

–

–

–

14

Reserved

No connect

–

–

–

15

Reserved

No connect

–

–

–

16

Reserved

No connect

–

–

–

17

SCK

SPI clock

1

In

–

18

MOSI

SPI master out slave in serial data

1

In

–

19

MISO

SPI master in slave out serial data

1

Out

–

20

KEY (no pin)

–

–

–

–

21

SPI_CS

¯¯¯¯¯¯

Active low flash chip select

1

In

–

22

RST

¯¯¯

Active low reset

1

In

–

inactive, and the mote must be awakened using the /RST signal (for more information see the lowPowerSleep command in

the IA-510 Mote Serial API Guide).

The RST

¯¯¯ input pin is internally pulled up and connecting it is optional. When driven active low, the mote is hardware reset

until the signal is de-asserted. Refer to section 7.1 for timing requirements on the RST

¯¯¯ pin. Note that the mote may also be

reset using the mote serial command (see the SmartMesh IA-510 Mote Serial API Guide).

The TIME

¯¯¯¯ input pin is optional, and must either be driven or pulled up with a 5.1 M

Ω resistor. Unless noted otherwise, all

signals are active low.