PIC16LC712 datasheet(73/106 Pages) MICROCHIP

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 1999-2013 Microchip Technology Inc.

DS41106C-page 73

PIC16C712/716

12.0

ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings (†)

Ambient temperature under bias............................................................................................................ .-55°C to +125°C

Storage temperature .............................................................................................................................. -65°C to +150°C

Voltage on any pin with respect to VSS (except VDD, MCLR, and RA4) ......................................... -0.3V to (VDD + 0.3V)

Voltage on VDD with respect to VSS ......................................................................................................... -0.3V to +7.5V

Voltage on MCLR with respect to VSS (Note 2) ......................................................................................... 0V to +13.25V

Voltage on RA4 with respect to Vss ............................................................................................................... 0V to +8.5V

Total power dissipation (Note 1) (PDIP and SOIC) ................................................................................................... 1.0W

Total power dissipation (Note 1) (SSOP) ................................................................................................................0.65W

Maximum current out of VSS pin ...........................................................................................................................300 mA

Maximum current into VDD pin .............................................................................................................................. 250 mA

Input clamp current, IIK (VI < 0 or VI > VDD)

 20 mA

Output clamp current, IOK (VO < 0 or VO > VDD)

 20 mA

Maximum output current sunk by any I/O pin..........................................................................................................25 mA

Maximum output current sourced by any I/O pin .................................................................................................... 25 mA

Maximum current sunk by

PORTA and PORTB (combined).................................................................................200 mA

Maximum current sourced by PORTA and PORTB (combined) ........................................................................... 200 mA

Note 1: Power dissipation is calculated as follows: Pdis = VDD x {IDD -

 IOH} +  {(VDD-VOH) x IOH} + (VOl x IOL)

2: Voltage spikes below VSS at the MCLR/VPP pin, inducing currents greater than 80 mA, may cause latch-up.

Thus, a series resistor of 50-100

 should be used when applying a “low” level to the MCLR/VPP pin rather

than pulling this pin directly to VSS.

† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the

device. This is a stress rating only and functional operation of the device at those or any other conditions above those

indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for

extended periods may affect device reliability.

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