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MCP3911 Datasheet(PDF) 3 Page - Microchip Technology |
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MCP3911 Datasheet(HTML) 3 Page - Microchip Technology |
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3 / 72 page ![]() © 2012 Microchip Technology Inc. DS22286A-page 3 MCP3911 1.0 ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS † V DD ..................................................................... -0.3V to 4.0V Digital inputs and outputs w.r.t. AGND................ --0.3V to 4.0V Analog input w.r.t. AGND..................................... ....-2V to +2V VREF input w.r.t. AGND ............................... -0.6V to VDD +0.6V Storage temperature .....................................-65°C to +150°C Ambient temp. with power applied ................-65°C to +125°C Soldering temperature of leads (10 seconds) ............. +300°C ESD on the analog inputs (HBM,MM) ................. 4.0 kV, 200V ESD on all other pins (HBM,MM) ........................ 4.0 kV, 200V † Notice: Stresses above those listed under “Absolute Maxi- mum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions, above those indi- cated in the operational listings of this specification, is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. 1.1 ELECTRICAL SPECIFICATIONS TABLE 1-1: ANALOG SPECIFICATIONS TARGET TABLE Electrical Specifications: Unless otherwise indicated, all parameters apply at AVDD = DVDD = 2.7V to 3.6V, MCLK = 4 MHz; PRE<1:0> = 00; OSR = 256; GAIN = 1; VREFEXT=0, CLKEXT=1, AZ_FREQ=0, DITHER<1:0>=11, BOOST<1:0> = 10; VCM=0V; TA = -40°C to +125°C; VIN = 1.2 VPP = 424 mVRMS @ 50/60 Hz on both channels. Sym Characteristic Min Typ Max Units Test Conditions ADC Performance Resolution (No Missing Codes) 24 -- -- bits OSR = 256 or greater fS(DMCLK) Sampling Frequency 1 4 MHz For maximum condi- tion, BOOST<1:0> = 11 fD(DRCLK) Output Data Rate 4 125 ksps For maximum condi- tion, BOOST<1:0> = 11, OSR = 32 CH0+/- Analog Input Absolute Voltage on CH0+, CH0-, CH1+, CH1- pins -1 +1 V All analog input channels, measured to AGND IIN Analog Input Leakage Current +/-1 nA RESET<1:0>=11, MCLK running continuously (CHn+-CHn-) Differential Input Voltage Range -600/GAIN +600/ GAIN mV VREF=1.2V, proportional to VREF VOS Offset Error -1 0.2 +1 mV (Note 4) Offset Error Drift 0.5 µV/°C GE Gain Error -4 +4 % (Note 4) Note 1: This specification implies that the ADC output is valid over this entire differential range and that there is no distortion or instability across this input range. Dynamic Performance specified at -0.5 dB below the maximum signal range, VIN = 1.2VPP = 424 mVRMS, VREF = 1.2V @ 50/60 Hz. See terminology section for definition. This parameter is established by characterization and not 100% tested. See performance graphs for other than default settings provided here. 2: For these operating currents the following configuration bit settings apply: SHUTDOWN<1:0>=00, RESET<1:0>=00, VREFEXT=0, CLKEXT=0. 3: For these operating currents the following configuration bit settings apply: SHUTDOWN<1:0>=11, VREFEXT=1, CLKEXT=1. 4: Applies to all gains. Offset and gain errors depend on PGA gain setting, see typical performance curves for typical per- formance. 5: Outside of this range, ADC accuracy is not specified. An extended input range of +/-2 V can be applied continuously to the part with no damage. 6: For proper operation, and for optimizing ADC accuracy, AMCLK should be limited to the maximum frequency defined in the Table 5-2 as a function of the BOOST and PGA setting chosen. MCLK can take larger values as long as the pres- caler settings (PRE<1:0>) limit AMCLK=MCLK/PRESCALE in the defined range in the Table 5-2. |
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