ADuM5010

Data Sheet

Rev. A | Page 12 of 16

APPLICATIONS INFORMATION

The dc-to-dc converter section of the ADuM5010 works on

principles that are common to most modern power supplies.

It has split controller architecture with isolated pulse-width

oscillating circuit that switches current into a chip-scale air core

transformer. Power transferred to the secondary side is rectified

and regulated to a value between 3.15 V and 5.25 V depending

on the setpoint supplied by an external voltage divider (see

the output by creating a PWM control signal that is sent to the

PWM modulates the oscillator circuit to control the power being

sent to the secondary side. Feedback allows for significantly higher

power and efficiency.

R1

R2

R1

)

(

V

23

.

1

+

=

(1)

where:

Because the output voltage can be adjusted continuously

there are an infinite number of operating conditions. This

data sheet addresses three discrete operating conditions in the

Specifications tables. Many other combinations of input and

output voltage are possible; Figure 13 depicts the supported

voltage combinations at room temperature. Figure 13 was

voltage until the PWM was at 80% duty cycle. Each of the

curves represents the minimum input voltage that is required

for operation under this criterion. For example, if the applica-

tion requires 30 mA of output current at 5 V, the minimum

recommended. Even at 10 mA of output current, the PWM

cannot maintain less than 80% duty factor, leaving no margin

to support load or temperature variations.

Typically, the ADuM5010 dissipates about 17% more power

between room temperature and maximum temperature; there-

fore, the 20% PWM margin covers temperature variations.

The ADuM5010 implements undervoltage lockout (UVLO)

with hysteresis on the primary and secondary sides I/O pins

converter does not go into oscillation due to noisy input power

or slow power-on ramp rates.

PCB LAYOUT

The ADuM5010 digital isolator, with a 0.15 W isoPower integrated

dc-to-dc converter, requires no external interface circuitry

for the logic interfaces. Power supply bypassing with a low ESR

capacitor is required as close to the chip pads as possible. The

isoPower inputs require several passive components to bypass

the power effectively as well as to set the output voltage and

to bypass the core voltage regulator (see Figure 16 through

Figure 18).

PDIS

10µF

0.1µF

+

8

9

10

10µF

0.1µF

+

10k

Ω

30k

Ω

13

12

11

The power supply section of the ADuM5010 uses a 125 MHz

oscillator frequency to efficiently pass power through its chip-

scale transformers. Bypass capacitors must do more than one

job and must be chosen carefully. Noise suppression requires a

low inductance, high frequency capacitor; ripple suppression

and proper regulation require a large value bulk capacitor.

These capacitors are most conveniently connected between

To suppress noise and reduce ripple, a parallel combination of at

least two capacitors is required. The recommended capacitor

must have a low ESR; for example, use of an NPO or X5R ceramic

capacitor is advised. Ceramic capacitors are also recommended for

the 10 mF bulk capacitance. An additional 10 nF capacitor can be

added in parallel if further EMI/EMC control is desired.

Note that the total lead length between the ends of the low ESR

capacitor and the input power supply pin must not exceed 2 mm.

PDIS

BYPASS < 2mm

ADuM5010

Figure 18. Recommended PCB Layout

In applications involving high common-mode transients, design

the board layout such that any coupling that does occur equally

affects all pins on a given component side. Failure to ensure this can

cause voltage differentials between pins, exceeding the absolute

maximum ratings specified in Table 13, and thereby leading to

latch-up and/or permanent damage.