YMB

package package markings:

YM

= YEAR / MONTH DATE CODE

D

= DAY OF LASER MARK

S

= ASSEMBLY SITE CODE

0

= Pin A1 (Filled Solid)

I

SOURCE

VBAT

GND

C

B

A

2

1

NanoFree YMB PACKAGE

(BOTTOM VIEW)

I

SINK

SCL

SDA

201A

YMDS

NanoFree YMB PACKAGE

(TOP VIEW)

201AB

YMDS

NanoFree YMB PACKAGE

(TOP VIEW)

NON-COATED

COATED

DRV201A

SLVSBN6 – JUNE 2013

www.ti.com

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

ORDERABLE PART NUMBER

TOP-SIDE MARKING

YMB (non-coated)

DRV201AYMBR

201A YMDS

-40°C to 85°C

YMB (coated)

DRV201AYMBRB

201AB YMDS

(1)

For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

web site at www.ti.com.

(2)

Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.

DEVICE INFORMATION

The coated package option has a backside polymer coating that is 40µm thick. The final package heights of both

the packages are the same for both options. This coating helps minimize edge chipping or die cracking during

assembly and manufacturing.

TERMINAL FUNCTIONS

TERMINAL

I/O

DESCRIPTION

NAME

NO.

VBAT

2A

Power

GND

1A

Ground

I_SOURCE

2B

Voice coil positive terminal

I_SINK

1B

Voice coil negative terminal

SCL

2C

I

SDA

1C

I/O

2

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Product Folder Links: DRV201A