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GD82541PI Datasheet(PDF) 32 Page - Intel Corporation |
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GD82541PI Datasheet(HTML) 32 Page - Intel Corporation |
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32 / 46 page ![]() 82541(PI/GI/EI) — Networking Silicon 32 Table 21. EEPROM Link Interface Clock Requirements Symbol Parametera a. The EEPROM clock is derived from a 125 MHz internal clock. Min Typ Max Unit TPW Microwire EESK pulse width TPERIOD x 64 ns SPI EESK pulse width TPERIOD x 32 ns Table 22. EEPROM Link Interface Clock Requirements Symbol Parametera Min Typ Max Unit TDOS EEDO setup time TCYC*2 ns TDOH EEDO hold time 0 ns a. The EEDO setup and hold time is a function of the PCI bus clock cycle time but is referenced to O_EESK. |
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