IP1827 datasheet(23/39 Pages) IRF

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iP1827

Highly Integrated 25A Single‐input Voltage,

Synchronous Buck Regulator

March 5, 2012 | V1.4

97599

By replacing Zin and Zf according to Figure 19, the transfer

function can be expressed as:





(25)

....

)

(

)

(

)

(

)

(

































VOSO

VREF

R10

FZ1

FZ2

FP2

FP3

E/A

ZIN

Frequency

Gain(dB)

H(s) dB

Comp

Figure 19: Type III Compensation network

and its asymptotic gain plot

The compensation network has three poles and two zeros

and they are expressed as follows:

(30)

)

(

(29)

(28)

(27)

(26)



























Cross over frequency is expressed as:

(31)







Based on the frequency of the zero generated by the

output capacitor and its ESR, relative to crossover

frequency, the compensation type can be different.

The table below shows the compensation types for

relative locations of the crossover frequency.

Compensator

Type

FESR v/s F0

Output

Capacitor

Type II

FLC < FESR < F0 < FS/2

Electrolytic

Tantalum

Type III

FLC < F0 < FESR

Tantalum

Ceramic

The higher the crossover frequency, the potentially faster

the load transient response will be. However, the

crossover frequency should be low enough to allow

attenuation of switching noise. Typically, the control loop

bandwidth or crossover frequency is selected such that:





1/10

1/5



The DC gain should be large enough to provide high

DC‐regulation accuracy. The phase margin should be

greater than 45

o for overall stability.

For this design we have:

Vin = 12V

Vo = 1.8V

β = Vref/Vo=0.333

Modulator gain = Fm = 0.65, from Figure 15

Vref = 0.6V

Lo = 0.3uH

Co = 10x22uF, ESR = 3mOhm each

It must be noted here that the value of the capacitance

used in the compensator design must be the small signal

value. For instance, the small signal capacitance of the

22uF capacitor used in this design is 12uF at 1.8V DC bias

and 600kHz frequency. It is this value that must be used for

all computations related to the compensation. The small

signal value may be obtained from the manufacturer’s

datasheets, design tools or SPICE models. Alternatively,

they may also be inferred from measuring the power stage

transfer function of the converter and measuring the

double pole frequency FLC and using equation (16) to

compute the small signal Co.

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