DSPIC33FJ32GP302THSLASHSP datasheet(217/403 Pages) MICROCHIP

Part #	DSPIC33FJ32GP302TH/SP

Description	High-Performance, 16-bit Digital Signal Controllers

PDF	403 Pages

Scroll/Zoom	100%

Manufacturer	MICROCHIP [Microchip Technology]

Direct Link	http://www.microchip.com

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217 / 403 page

 2009 Microchip Technology Inc.

Preliminary

DS70292D-page 217

dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04

bit 4

URXINV: Receive Polarity Inversion bit

= UxRX Idle state is ‘0’

= UxRX Idle state is ‘1’

bit 3

BRGH: High Baud Rate Enable bit

= BRG generates 4 clocks per bit period (4x baud clock, High-Speed mode)

= BRG generates 16 clocks per bit period (16x baud clock, Standard mode)

bit 2-1

PDSEL<1:0>: Parity and Data Selection bits

= 9-bit data, no parity

= 8-bit data, odd parity

= 8-bit data, even parity

= 8-bit data, no parity

bit 0

STSEL: Stop Bit Selection bit

= Two Stop bits

= One Stop bit

UxMODE: UARTx MODE REGISTER (CONTINUED)

Note 1: Refer to Section 17. “UART” (DS70188) in the “dsPIC33F/PIC24H Family Reference Manual” for infor-

mation on enabling the UART module for receive or transmit operation.

2: This feature is only available for the 16x BRG mode (BRGH = 0).

DSPIC33FJ32GP302TH/SP Datasheet(PDF) 217 Page - Microchip Technology