 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
DSPIC33FJ32GP302TH/SP Datasheet(PDF) 360 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
DSPIC33FJ32GP302TH/SP Datasheet(HTML) 360 Page - Microchip Technology |
|
|
360 / 403 page  dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04 DS70292D-page 360 Preliminary 2009 Microchip Technology Inc. TABLE 30-42: AUDIO DAC MODULE SPECIFICATIONS TABLE 30-41: ADC CONVERSION (10-BIT MODE) TIMING REQUIREMENTS AC CHARACTERISTICS Standard Operating Conditions: 3.0V to 3.6V (unless otherwise stated) Operating temperature -40°C TA +85°C for Industrial -40°C T A +125°C for Extended Param No. Symbol Characteristic Min. Typ(2) Max. Units Conditions Clock Parameters(1) AD50 TAD ADC Clock Period 76 — — ns — AD51 tRC ADC Internal RC Oscillator Period — 250 — ns — Conversion Rate AD55 tCONV Conversion Time — 12 TAD —— — AD56 FCNV Throughput Rate — — 1.1 Msps — AD57 TSAMP Sample Time 2 TAD —— — — Timing Parameters AD60 tPCS Conversion Start from Sample Trigger(2) 2 TAD —3 TAD — Auto-Convert Trigger not selected AD61 tPSS Sample Start from Setting Sample (SAMP) bit(2) 2 TAD —3 TAD —— AD62 tCSS Conversion Completion to Sample Start (ASAM = 1)(2) —0.5 TAD —— — AD63 tDPU Time to Stabilize Analog Stage from ADC Off to ADC On(2,3) —— 20 s— Note 1: Because the sample caps eventually loses charge, clock rates below 10 kHz may affect linearity performance, especially at elevated temperatures. 2: These parameters are characterized but not tested in manufacturing. 3: The tDPU is the time required for the ADC module to stabilize at the appropriate level when the module is turned on (AD1CON1<ADON>=’1’). During this time, the ADC result is indeterminate. AC/DC CHARACTERISTICS Standard Operating Conditions: 3.0V to 3.6V (unless otherwise stated) Operating temperature -40°C TA +85°C for Industrial -40°C TA +125°C for Extended Param No. Symbol Characteristic Min. Typ Max. Units Conditions Clock Parameters DA01 VOD+ Positive Output Differential Voltage 11.15 2 V VOD+ = VDACH – VDACL See Note 1, 2 DA02 VOD- Negative Output Differential Voltage -2 -1.15 -1 V VOD- = VDACL – VDACH See Note 1, 2 DA03 VRES Resolution — 16 — bits — DA04 GERR Gain Error — 3.1 — % — DA08 FDAC Clock frequency — — 25.6 MHz — DA09 FSAMP Sample Rate 0 — 100 kHz — DA10 FINPUT Input data frequency 0 — 45 kHz Sampling frequency = 100 kHz DA11 TINIT Initialization period 1024 — — Clks Time before first sample DA12 SNR Signal-to-Noise Ratio — 61 dB Sampling frequency = 96 kHz Note 1: Measured VDACH and VDACL output with respect to VSS, with no load and FORM bit (DACXCON<8>) = 0. 2: This parameter is tested at -40°C TA 85°C only. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
