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DSPIC33FJ32GP302TH/SP Datasheet(PDF) 126 Page - Microchip Technology |
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DSPIC33FJ32GP302TH/SP Datasheet(HTML) 126 Page - Microchip Technology |
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126 / 403 page ![]() dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04 DS70292D-page 126 Preliminary 2009 Microchip Technology Inc. REGISTER 7-30: IPC19: INTERRUPT PRIORITY CONTROL REGISTER 19 U-0 R/W-1 R/W-0 R/W-0 U-0 R/W-0 R/W-0 R/W-0 — DAC1LIP<2:0>(1) —DAC1RIP<2:0>(1) bit 15 bit 8 U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0 — — — — — — — — bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15 Unimplemented: Read as ‘0’ bit 14-12 DAC1LIP<2:0>: DAC Left Channel Interrupt Flag Status bit(1) 111 = Interrupt is priority 7 (highest priority interrupt) • • • 001 = Interrupt is priority 1 000 = Interrupt source is disabled bit 11 Unimplemented: Read as ‘0’ bit 10-8 DAC1RIP<2:0>: DAC Right Channel Interrupt Flag Status bit(1) 111 = Interrupt is priority 7 (highest priority interrupt) • • • 001 = Interrupt is priority 1 000 = Interrupt source is disabled bit 7-0 Unimplemented: Read as ‘0’ Note 1: Interrupts disabled on devices without Audio DAC modules. |
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