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DSPIC33FJ32GP302TH/SP Datasheet(PDF) 157 Page - Microchip Technology |
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DSPIC33FJ32GP302TH/SP Datasheet(HTML) 157 Page - Microchip Technology |
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157 / 403 page ![]() 2009 Microchip Technology Inc. Preliminary DS70292D-page 157 dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04 REGISTER 10-3: PMD3: PERIPHERAL MODULE DISABLE CONTROL REGISTER 3 U-0 U-0 U-0 U-0 U-0 R/W-0 R/W-0 R/W-0 — — — — — CMPMD RTCCMD PMPMD bit 15 bit 8 R/W-0 R/W-0 U-0 U-0 U-0 U-0 U-0 U-0 CRCMD DAC1MD — — — — — — bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15-11 Unimplemented: Read as ‘0’ bit 10 CMPMD: Comparator Module Disable bit 1 = Comparator module is disabled 0 = Comparator module is enabled bit 9 RTCCMD: RTCC Module Disable bit 1 = RTCC module is disabled 0 = RTCC module is enabled bit 8 PMPMD: PMP Module Disable bit 1 = PMP module is disabled 0 = PMP module is enabled bit 7 CRCMD: CRC Module Disable bit 1 = CRC module is disabled 0 = CRC module is enabled bit 6 DAC1MD: DAC1 Module Disable bit 1 = DAC1 module is disabled 0 = DAC1 module is enabled bit 5-0 Unimplemented: Read as ‘0’ |
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