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MPC5604E Datasheet(PDF) 62 Page - Freescale Semiconductor, Inc |
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MPC5604E Datasheet(HTML) 62 Page - Freescale Semiconductor, Inc |
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62 / 75 page ![]() MPC5604E Microcontroller Data Sheet, Rev. 4 Electrical characteristics Freescale Semiconductor 62 Figure 33. MII transmit signal timing diagram 3.18.10.3 MII async inputs signal timing (CRS and COL) Figure 34. MII async inputs timing diagram 3.18.10.4 MII serial management channel timing (MDIO and MDC) The FEC functions correctly with a maximum MDC frequency of 5 MHz. Table 36. MII async inputs signal timing1 1 Output pads configured with SRC = 0b11. No. Parameter Min Max Unit 9 CRS, COL minimum pulse width 1.5 — TX_CLK period Table 37. MII serial management channel timing (MDIO and MDC) No. Parameter Min Max Unit 1 MDIO Input delay setup 28 — ns 2 MDIO Input delay hold 0— ns 3 MDIO Output delay valid —25 ns 4 MDIO Output delay Invalid 0— ns 5 MDC clock period 100 — ns 6 MDC Duty Cycle 40 60 % 7 TX_CLK (input) TXD[3:0] (outputs) TX_EN TX_ER 6 CRS, COL 9 |
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