TPS20xxC, TPS20xxC-2

SLVSAU6G – JUNE 2011 – REVISED JULY 2013

www.ti.com

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

MAXIMUM

OUTPUT

BASE PART

OPERATING

ENABLE

MSOP-8 (DGN)

SOT23-5

MSOP-8

DISCHARGE

NUMBER

CURRENT

PowerPAD™

(DBV)

(DGK)

0.5

Y

Low

TPS2041C

–

PYJI

–

0.5

Y

High

TPS2051C

–

VBYQ

–

1

Y

Low

TPS2061C

PXMI

PXLI

–

1

Y

High

TPS2065C

VCAQ

VCAQ

–

1

N

High

TPS2065C-2

PYRI

PYQI

–

1.5

Y

Low

TPS2068C

PXNI

–

–

1.5

Y

High

TPS2069C

VBUQ

PYKI

–

1.5

N

High

TPS2069C-2

PYSI

–

–

2

Y

Low

TPS2000C

BCMS

–

PXFI

2

Y

High

TPS2001C

VBWQ

–

PXGI

(1)

For the most current packaging and ordering information, see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com.

(2)

"-" indicates the device is not available in this package.

ABSOLUTE MAXIMUM RATINGS

(1) (2)

VALUE

UNIT

MIN

MAX

–0.3

6

V

Voltage range from IN to OUT

–6

6

V

Internally Limited

HBM

2

kV

Electrostatic Discharge

CDM

500

V

8

15

kV

(1)

Absolute maximum ratings apply over recommended junction temperature range.

(2)

Voltages are with respect to GND unless otherwise noted.

(3)

See the Input and Output Capacitance section.

(4)

THERMAL INFORMATION

0.5 A or 1 A

1.5 A or 2 A

0.5 A or 1 A

1.5 A or 2 A

2 A

Rated

Rated

Rated

Rated

Rated

UNITS

(See DEVICE INFORMATION table.)

DBV

DBV

DGN

DGN

DGK

5 PINS

5 PINS

8 PINS

8 PINS

8 PINS

Junction-to-ambient thermal resistance

224.9

220.4

72.1

67.1

205.5

Junction-to-case (top) thermal resistance

95.2

89.7

87.3

80.8

94.3

Junction-to-board thermal resistance

51.4

46.9

42.2

37.2

126.9

Junction-to-top characterization parameter

6.6

5.2

7.3

5.6

24.7

°C/W

Junction-to-board characterization parameter

50.3

46.2

42.0

36.9

125.2

Junction-to-case (bottom) thermal resistance

N/A

N/A

39.2

32.1

N/A

See the Power DIssipation and Junction

139.3

134.9

66.5

61.3

110.3

Temperature section

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

2

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