AD5317 datasheet(19/24 Pages) AD

19 / 24 page

AD5305/AD5315/AD5325

Rev. G | Page 19 of 24

When both bits are set to 0, the DAC works normally with its

normal power consumption of 600 μA at 5 V. However, for the

three power-down modes, the supply current falls to 200 nA at

5 V (80 nA at 3 V). Not only does the supply current drop, but

the output stage is also internally switched from the output of

the amplifier to a resistor network of known values. This has an

advantageous because the output impedance of the part is known

while the part is in power-down mode and provides a defined

input condition for whatever is connected to the output of the

DAC amplifier. There are three different options. The output is

connected internally to GND through a 1 kΩ resistor, a 100 kΩ

resistor, or it is left open-circuited (three-state). Resistor

tolerance = ±20%. The output stage is illustrated in Figure 35.

AMPLIFIER

RESISTOR

STRING DAC

POWER-DOWN

CIRCUITRY

VOUT

RESISTOR

NETWORK

Figure 35. Output Stage During Power-Down

The bias generator, the output amplifiers, the resistor string, and

all other associated linear circuitry are shut down when the

power-down mode is activated. However, the contents of the

DAC registers are unchanged when in power-down. The time to

exit power-down is typically 2.5 μs for VDD = 5 V and 5 μs when

VDD = 3 V. This is the time from the rising edge of the eighth

SCL pulse to when the output voltage deviates from its power-

down voltage. See Figure 21 for a plot.

AD5317 Datasheet(PDF) 19 Page - Analog Devices