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AD1933YSTZ Datasheet(PDF) 22 Page - Analog Devices |
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AD1933YSTZ Datasheet(HTML) 22 Page - Analog Devices |
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22 / 28 page ![]() AD1933 Data Sheet Rev. E | Page 22 of 28 AUXILIARY TDM PORT CONTROL REGISTERS Table 22. Auxiliary TDM Control 0 Bit Value Function Description 1:0 00 24 Word width 01 20 10 Reserved 11 16 4:2 000 1 SDATA delay (BCLK periods) 001 0 010 8 011 12 100 16 101 Reserved 110 Reserved 111 Reserved 6:5 00 Reserved Serial format 01 Reserved 10 DAC aux mode 11 Reserved 7 0 Latch in midcycle (normal) BCLK active edge (TDM in) 1 Latch in at end of cycle (pipeline) Table 23. Auxiliary TDM Control 1 Bit Value Function Description 0 0 50/50 (allows 32, 24, 20, or 16 bit clocks (BCLKs) per channel) LRCLK format 1 Pulse (32 BCLKs per channel) 1 0 Drive out on falling edge (DEF) BCLK polarity 1 Drive out on rising edge 2 0 Left low LRCLK polarity 1 Left high 3 0 Slave LRCLK master/slave 1 Master 5:4 00 64 BCLKs per frame 01 128 10 256 11 512 6 0 Slave BCLK master/slave 1 Master 7 0 AUXTDMBCLK pin BCLK source 1 Internally generated |
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