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AD1933YSTZ Datasheet(PDF) 24 Page - Analog Devices |
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AD1933YSTZ Datasheet(HTML) 24 Page - Analog Devices |
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24 / 28 page ![]() AD1933 Data Sheet Rev. E | Page 24 of 28 APPLICATION CIRCUITS Typical applications circuits are shown in Figure 21 through Figure 23. Figure 21 shows the recommended loop filters when using either the LR clock or the master clock as the PLL reference. Output filters for the DAC outputs are shown in Figure 22 and the regulator circuit is shown in Figure 23. 39nF + 2.2nF LF LRCLK AVDD2 3.32kΩ 5.6nF 390pF LF MCLK AVDD2 562Ω Figure 21. Recommended Loop Filters for LRCLK or MCLK PLL Reference 2 1 3 OP275 – + 2.2nF NPO AUDIO OUTPUT 604Ω 68pF NPO 150pF NPO 560pF NPO 270pF NPO DAC OUTN 3.01kΩ 11kΩ DAC OUTP 1.50kΩ 5.62kΩ 11kΩ 5.62kΩ Figure 22. Typical DAC Output Filter Circuit (Differential) 10µF + E C B VSUPPLY 5V VSENSE 3.3V FZT953 VDRIVE 1kΩ 100nF 10µF + 100nF Figure 23. Recommended 3.3 V Regulator Circuit |
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