| Electronic Components Datasheet Search |
|
DSPIC30F5015 Datasheet(PDF) 94 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
DSPIC30F5015 Datasheet(HTML) 94 Page - Microchip Technology |
|
94 / 234 page ![]() dsPIC30F5015/5016 DS70149E-page 94 © 2011 Microchip Technology Inc. 14.8 Quadrature Encoder Interface Interrupts The Quadrature Encoder Interface has the ability to generate an interrupt on occurrence of the following events: • Interrupt on 16-bit up/down position counter rollover/underflow • Detection of qualified index pulse, or if CNTERR bit is set • Timer period match event (overflow/underflow) • Gate accumulation event The QEI Interrupt Flag bit, QEIIF, is asserted upon occurrence of any of the above events. The QEIIF bit must be cleared in software. QEIIF is located in the IFS2 Status register. Enabling an interrupt is accomplished via the respec- tive enable bit, QEIIE. The QEIIE bit is located in the IEC2 Control register. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |