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DSPIC30F5015 Datasheet(PDF) 110 Page - Microchip Technology |
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DSPIC30F5015 Datasheet(HTML) 110 Page - Microchip Technology |
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110 / 234 page  dsPIC30F5015/5016 DS70149E-page 110 © 2011 Microchip Technology Inc. 16.1.2 SDOx DISABLE A control bit, DISSDO, is provided to the SPIxCON reg- ister to allow the SDOx output to be disabled. This will allow the SPI module to be connected in an input only configuration. SDO can also be used for general purpose I/O. FIGURE 16-1: SPI BLOCK DIAGRAM FIGURE 16-2: SPI MASTER/SLAVE CONNECTION Note: x = 1 or 2. Read Write Internal Data Bus SDIx SDOx SSx SCKx SPIxSR SPIxBUF bit 0 Shift clock Edge Select FCY Primary 1, 4, 16, 64 Enable Master Clock Prescaler Secondary Prescaler 1:1-1:8 SS and FSYNC Control Clock Control Transmit SPIxBUF Receive Serial Input Buffer (SPIxBUF) Shift Register (SPIxSR) MSb LSb SDOx SDIx PROCESSOR 1 SCKx SPI Master Serial Input Buffer (SPIyBUF) Shift Register (SPIySR) LSb MSb SDIy SDOy PROCESSOR 2 SCKy SPI Slave Serial Clock Note: x = 1 or 2, y = 1 or 2. |
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