DM3725CBC datasheet(172/280 Pages) TI

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GPMC_FCLK

gpmc_clk

gpmc_ncsx

gpmc_a[10:1]

gpmc_nbe0_cle

gpmc_nbe1

gpmc_nadv_ale

gpmc_noe

gpmc_d[15:0]

gpmc_waitx

gpmc_io_dir

Valid Address

Valid

Data IN 0

OUT

FA0

FA9

FA10

FA3

FA1

FA4

FA12

FA13

FA0

FA10

FA5

FA14

FA15

SWPS038-019

DM3730, DM3725

SPRS685D

– AUGUST 2010 – REVISED JULY 2011

www.ti.com

(1)

In gpmc_ncsx, x is equal to 0, 1, 2, 3, 4, 5, 6, or 7. In gpmc_waitx, x is equal to 0, 1, 2, or 3.

(2)

FA5 parameter illustrates amount of time required to internally sample input data. It is expressed in number of GPMC functional clock

cycles. From start of read cycle and after FA5 functional clock cycles, input data will be internally sampled by active functional clock

edge. FA5 value must be stored inside AccessTime register bits field.

(3)

GPMC_FCLK is an internal clock (GPMC functional clock) not provided externally.

Figure 6-7. GPMC / NOR Flash

—Asynchronous Read—Single Word

172

Timing Requirements and Switching Characteristics

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DM3725CBC Datasheet(PDF) 172 Page - Texas Instruments

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