DM3725CBC datasheet(181/280 Pages) TI

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GPMC_FCLK

gpmc_ncsx

gpmc_nbe0_cle

gpmc_nadv_ale

gpmc_noe

gpmc_waitx

DATA

GNF10

GNF14

GNF15

GNF12

SWPS038-027

GNF13

gpmc_a[16:1]

(gpmc_d[15:0])

GPMC_FCLK

gpmc_ncsx

gpmc_nbe0_cle

gpmc_nadv_ale

gpmc_noe

gpmc_nwe

DATA

GNF0

GNF1

GNF4

GNF9

GNF3

GNF6

SWPS038-028

gpmc_a[16:1]

(gpmc_d[15:0])

DM3730, DM3725

www.ti.com

SPRS685D

– AUGUST 2010 – REVISED JULY 2011

(1)

GNF12 parameter illustrates amount of time required to internally sample input data. It is expressed in number of GPMC functional

clock cycles. From start of read cycle and after GNF12 functional clock cycles, input data will be internally sampled by active

functional clock edge. GNF12 value must be stored inside AccessTime register bits field.

(2)

GPMC_FCLK is an internal clock (GPMC functional clock) not provided externally.

(3)

In gpmc_ncsx, x is equal to 0, 1, 2, 3, 4, 5, 6, or 7. In gpmc_waitx, x is equal to 0, 1, 2, or 3.

Figure 6-15. GPMC / NAND Flash

—Data Read Cycle

(1)

In gpmc_ncsx, x is equal to 0, 1, 2, 3, 4, 5, 6, or 7.

Figure 6-16. GPMC / NAND Flash

—Data Write Cycle

Timing Requirements and Switching Characteristics

181

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DM3725CBC Datasheet(PDF) 181 Page - Texas Instruments

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