DM3725CBC datasheet(256/280 Pages) TI

256 / 280 page

DM3730, DM3725

SPRS685D

– AUGUST 2010 – REVISED JULY 2011

www.ti.com

Table 6-123. MMC1 Interface Switching Characteristics

—High-Speed MMC Mode(4) (8)

NO.

PARAMETER

OPP100

OPP50

UNIT

MIN

MAX

MIN

MAX

MMC1

tc(clk)

Frequency(1), output clk period

MHz

MMC2

tW(clkH)

Typical pulse duration, output clk high

X(6)*PO(2)

MMC2

tW(clkL)

Typical pulse duration, output clk low

Y(7)*PO(2)

tdc(clk)

Duty cycle error, output clk

1041.7

2083.3

tJ(clk)

Jitter standard deviation(3), output clk

200

MMC1 Interface (1.8-V IO)

tR(clk)

Rise time, output clk

tF(clk)

Fall time, output clk

tR(data)

Rise time, output data

tF(data)

Fall time, output data

MMC5

td(CLKOH-CMD)

Delay time, mmc1_clk rising clock edge to mmc1_cmd

3.7

14.1

4.1

34.5

transition

MMC6

td(CLKOH-DATx)

Delay time, mmc1_clk rising clock edge to

3.7

14.1

4.1

34.5

mmc1_dat[n:0](5) transition

MMC1 Interface (3.0-V IO)

tR(clk)

Rise time, output clk

tF(clk)

Fall time, output clk

tR(data)

Rise time, output data

tF(clk)

Fall time, output data

MMC5

td(CLKOH-CMD)

Delay time, mmc1_clk rising clock edge to mmc1_cmd

3.7

14.1

4.1

34.5

transition

MMC6

td(CLKOH-DATx)

Delay time, mmc1_clk rising clock edge to

3.7

14.1

4.1

34.5

mmc1_dat[n:0](5) transition

(1) Related with the output clock maximum and minimum frequencies programmable in MMC module.

(2) PO = output clock period in ns

(3) The jitter probability density can be approximated by a Gaussian function.

(4) Corresponding figures showing timing parameters are common with the Standard MMC mode figures.

(5) In MMC1_dat[n:0], n is equal to 3.

(6) The X parameter is defined as follows:

CLKD

1 or Even

0.5

Odd

(trunk[CLKD/2]+1)/CLKD

All required details about clock division factor CLKD can be found in the AM/DM37x Multimedia Device Technical Reference Manual

(literature number SPRUGN4).

(7) The Y parameter is defined as follows:

CLKD

1 or Even

0.5

Odd

(trunk[CLKD/2])/CLKD

All required details about clock division factor CLKD can be found in the AM/DM37x Multimedia Device Technical Reference Manual

(literature number SPRUGN4).

(8) See Section 4.3.4, Processor Clocks.

256

Timing Requirements and Switching Characteristics

Submit Documentation Feedback

Product Folder Link(s): DM3730 DM3725

DM3725CBC Datasheet(PDF) 256 Page - Texas Instruments

DM3725CBC Datasheet(HTML) 256 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL